Timing hazards occur when computation creates/reads a garbage value because a register changes while a wire still depends on it. Anvil catches such errors at compile time. We’re actively evolving the language. Your feedback will help us make HDLs safer and easier to use 🙏
Jason Yu@corankyu
We are excited to share AnvilHDL (accepted at #ASPLOS26), a hardware description language with a type system that prevents a common class of bugs (which we call timing hazards) without sacrificing expressiveness for low-level control. Try it online: anvil.kisp-lab.org
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