BLT - The FPGA Experts

Confused about the difference between AMD Vivado and Vitis?  This quick breakdown explains what each tool does and where it fits in the AMD development flow for FPGAs and SoCs: bltinc.com/2026/05/20/amd… #vivado #vitis #amd

The AMD Spartan UltraScale+ is worth a look if you need cost-optimized, power-efficient FPGAs with serious I/O and PCIe Gen4 capability. Our no-cost workshop will highlight the core capabilities of this newer device from AMD. REGISTER: bltinc.com/xilinx-trainin…

Yesterday, our Technical Director co-presented an AMD SDR Reference Design at the AMD Signal Processing Working Group in Longmont, CO and tonight we're putting it on display.  If you're at Partner Night, stop by our table for a live demo. 🔊📡 #AMD #SoftwareDefinedRadio

As an AMD Premier Partner, the BLT Team was proud to showcase our AMD SDR Reference Design demo at the Embedded Computing Summit DC.  We'll be bringing the same demo to the AMD ECS CO and the AMD SPWG next week. Proven capability. Proven partnership. #AMD #SDR #EmbeddedSystems

Stop rebuilding the same FPGA blocks from scratch on every project. Learn how modular design in Verilog and VHDL lets you write it once and reuse it across many designs. 👉 bltinc.com/2026/05/06/mod… #FPGA #Verilog #VHDL

Will you be at any of these events? Be sure to catch up with our BLT team. #amd #xilinx #SPWG #ECS #longmont #dsp #fpga #soc

Can't afford board respins? You need a PCB partner who gets it right the first time. BLT engineers PCBs for signal integrity, power delivery, thermal performance, and manufacturability. Starting fresh or optimizing an existing design, we can help. 👉 bltinc.com/pcb-design-dev…

Is your FPGA design having timing issues? Timing issues are often tied to utilization. The Vivado Utilization Report helps identify where the problem is. In our latest blog post we'll break it down. READ: bltinc.com/2026/04/22/und…

Turn robotics ideas into working systems faster. This month's webinar dives into the AMD Kria KR260 Robotics Starter Kit, showing how the Kria SOM lets you prototype, control, and iterate on both software and hardware with ease. 4/22/26 @ 2 pm REGISTER: bltinc.com/xilinx-trainin…

The BLT team is on the ground in Nashville at the AAAA Army Aviation Warfighter Summit! 🚁 If you're here, come find us or drop us a message below. Let's connect! #AAAASummit #ArmyAviation

Do you know the difference between an FPGA and a SoC?  Read our blog post to understand what they are and when to use an FPGA vs. a SoC in electronics applications. READ: bltinc.com/2026/04/08/wha…

BLT's designs have traveled to Mars... and we bring that same precision to every design we do. We engineer solutions for the missions that demand absolute reliability. Let's build something out of this world. 🚀 bltinc.com/design-service… #marsrover

Are your testbenches catching bugs or creating chaos?🪲Discover how SystemVerilog testbenches offer more flexibility and control than traditional VHDL approaches, helping you debug faster and more reliably. Read our blog: bltinc.com/2026/03/25/wri…

BLT is in two places at once this week! While some of our team is on the floor at the Dixie Crow Symposium 50 at Robins AFB GA, our team is also walking the floor at SAT Show in Washington, DC. If you're at the Sat Show, reach out! We'd love to connect.

Some of our Florida team gathered recently for a fun night out with a great view. We managed to grab a quick group shot in the middle of all the fun!🌊✨

Attending Dixie Crow Symposium 50 next week? Reserve time with BLT's Director, Technical Solutions, Elie Rosen. 👉lnkd.in/eznNdaGe If you're managing an Aerospace & Defense program that depends on FPGAs or embedded software, this is a conversation worth having.

We're heading to the AOC Dixie Crow Symposium in GA next week! 🎯 Stop by our booth #46 to talk EW, FPGA design, embedded solutions, and how we help A&D programs like yours solve their toughest engineering challenges. If you're attending, let's connect. We'll see you there!

@AMD @AMDembedded

BLT President Ed McCauley with AMD CEO Lisa Su at the IEEE FPGA dedication ceremony. Ed started with the Xilinx founders in 1985 and became one of the first FAEs in 1987. Decades later, BLT remains a close AMD partner, a Premier Partner and ATP. Together, we advance.

No-cost workshop 3/18/26 from 10-4 ET online REGISTER: bltinc.com/xilinx-trainin… Is your design dealing with timing violations? Take the guesswork out by taking our workshop. Learn how to approach timing analysis and closure in AMD Vivado like a pro.