SystemC

Do join us on TODAY (Dec 21) at 8.30 pm for a webinar on ‘Semiconductors: India’s $10 Billion Opportunity”. Excellent panel comprising of subject matter experts. Catch the session live at youtu.be/mYQkhL2K4y8

WATCH: A small trailer in the run up to today's panel discussion at 8.30pm IST organized by @SwarajyaMag

Follow us for some interesting updates on opensource RISCV Verification.

DVCon: The Imitation Game bit.ly/1EYxAeF

Accellera Systems Initiative UVM 1.2 Proceeds to IEEE Standardization tinyurl.com/mp98ylx

Accellera Systems Initiative UVM 1.2 Proceeds to IEEE Standardization Quote Sheet tinyurl.com/lvch5dj

Justin Refice Receives Accellera Systems Initiative Technical Excellence Award tinyurl.com/odc3hc5

Accellera Systems Initiative Forms Portable Stimulus Working Group tinyurl.com/mzbtmrl

Accellera Systems Initiative Forms Portable Stimulus Working Group - Quote sheet tinyurl.com/l6fx2es

Passing the buck in SystemVerilog systemverilog.net/2014/12/03/pas…

#DVConEurope day1. 14 tutorials. Something for everyone. Low power for me. #upf #accellera #snps @DVConEurope - ytri

A tutorial on UVM-SystemC at DVCon Europe 2014

Phillip Hartmann going over SystemC Roadmap

Martin Barnisconi opens #DVConEurope.

DVCon Europe 2014 has an ESL track.

@TryGhost Am I allowed to use a subdir in config.url? I get a message "CANNOT GET /" on the browser if I do that. Ghost release 5.2

Intel's Shishpal Rawat: Multiple hats, Singular focus bit.ly/1mVViC5

The discussion is heating up: "@systemC: Should Verification and Design be done in same language? linkedin.com/groupItem?view…"

Should Verification and Design be done in same language? linkedin.com/groupItem?view…

Did you know that SystemVerilog DPI interface adds a significant C/C++ function call overhead? Vlang is ABI compatible with C/C++.