Rahul Todi

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Rahul Todi

Rahul Todi

@rtodi

Semiconductor Expert | Business Leader @ Renesas

Eindhoven, Nederland Sumali Nisan 2009
98 Sinusundan5.8K Mga Tagasunod
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Rahul Todi
Rahul Todi@rtodi·
📱 Global Smartphone Market Declines 4% in Q1 2026 (Preliminary data – Smart Analytics Global) The overall industry shipped 4% fewer smartphones year-over-year in the first quarter, even as the top vendors showed mixed results. Why the 4% decline? The drop was mainly driven by rising component costs, particularly memory chips (DRAM and NAND flash). These shortages increased prices for entry-level and mid-range devices — which account for the majority of global volume. Price-sensitive consumers and budget-focused brands were hit hardest, resulting in softer demand and lower shipments across much of the market. Premium smartphones proved more resilient, as higher average selling prices helped offset the cost increases. Broader picture: - The market continues to polarize between a stronger premium segment and weakness in the mass market. - While shipment volumes declined, industry revenue likely held up better due to rising ASPs (average selling prices). This is preliminary data from Smart Analytics Global, released April 10, 2026. Some analysts had expected even steeper declines, so the actual -4% came in relatively mild. Will improving memory supply help the industry rebound later in 2026, or will cost pressures continue to weigh on volumes?
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India Semiconductor Mission
India’s #semiconductor strategy goes beyond manufacturing, to strengthen chip design, innovation and ecosystem. With vision to strengthen India’s semiconductor design ecosystem, DLI Scheme offers incentives and design infra. support across development and deployment stages.
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Rahul Todi
Rahul Todi@rtodi·
The shift toward Agentic AI compute and complex workloads is making CPUs "cool again" in the data center. While GPUs are the "muscle" for massive math, the CPU is emerging as the essential "manager"for the next wave of autonomous agents. Here’s why CPUs are gaining major traction in AI data centers: •The Rise of Agentic AI: Autonomous agents don't just answer prompts; they plan, branch, and use tools. This logic-heavy orchestration (API calls, code execution, and reasoning loops) runs primarily on the CPU. •Fixing the "GPU Bottleneck": As GPUs get faster at generating text, the surrounding tasks—like data preprocessing and scheduling—become the new speed limit. High-performance CPUs are needed to keep those expensive GPUs from sitting idle  •Edge & Small Model Efficiency: For smaller, specialized enterprise models (SLMs), the CPU is often the most cost-effective and power-efficient choice, especially for "always-on" edge devices like cameras and drones . •Built-in AI Acceleration: Modern server chips now feature dedicated "AI blocks" (like Intel AMX or AMD EPYC’s optimized pipelines) that handle inference natively without needing a separate GPU  •Lower TCO: Running AI on existing CPU infrastructure is often 30-50% cheaper for many businesses, avoiding the high cost and supply shortages associated with specialized accelerators  The Bottom Line: We’re moving from "GPU-only" to balanced system design. In the age of agents, your infrastructure is only as smart as its orchestrator !!
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Rahul Todi
Rahul Todi@rtodi·
AI data centers are exploding in power demand — racks are heading toward megawatts to train and run massive AI models. But delivering that power efficiently is a huge challenge. The old way (48V or 54V systems) creates massive problems: huge electric currents cause tons of energy wasted as heat (I²R losses), require thick heavy copper cables and busways that take up space and cost a fortune, and make it hard to scale bigger systems. Multiple inefficient conversion stages add even more losses and heat. The new approach? Switching to 800V DC architecture (strongly pushed by NVIDIA for next-gen "AI factories"). Higher voltage means much lower current for the same power — dramatically cutting waste, reducing copper usage (sometimes by 45%+), simplifying infrastructure, lowering cooling needs, and enabling compact, efficient megawatt-scale racks. It's like the EV industry's jump from 400V to 800V, but for data centers. Inside these 800V systems, power conversion happens in stages: - High-voltage front end (handling the full 800V bus or initial step-down): Often uses SiC (Silicon Carbide) switches. SiC is rugged and excellent for higher voltages (650V–1700V+ ratings), with strong thermal performance. These SiC switches are digitally controlled by microcontrollers or DSPs (the "brain") running smart firmware for PWM timing, regulation, and protection. Isolated gate drivers act as the safe interface — sending precise high-current pulses to turn the SiC on/off quickly while protecting against high-voltage spikes. - Back-end / point-of-load (POL) stages (stepping down from intermediate voltages like 48V down to the ~1V that GPUs and CPUs actually need): This is where GaN (Gallium Nitride) really shines. GaN switches faster than silicon or even SiC in many cases, with lower losses, enabling tiny, high-frequency regulators that sit right next to the processors — minimizing wasteful power routing and improving response to bursty AI workloads. Now the exciting breakthrough from Intel Foundry (presented at IEDM 2025): They demonstrated the world's thinnest GaN chiplet — with a silicon base just 19 μm thick (thinner than a human hair!), harvested from standard 300mm GaN-on-silicon wafers. What's special? It's the industry's first fully monolithic integration: powerful GaN power transistors (N-MOSHEMT) + complete silicon-based digital control circuits (logic gates, flip-flops, multiplexers, ring oscillators, etc.) all on the same single device. No need for separate controller chips, which cuts parasitics, speeds things up, and shrinks everything. This ultra-thin design enables better heat dissipation, advanced 3D packaging, and placement extremely close to the AI chips — slashing losses even further. Reliability tests look solid for data center use. In the 800V world, SiC handles the tough high-voltage front end with its digital gate driver control, while Intel's GaN chiplet excels in the dense, efficient final stages closer to the load. Together, they make the whole power delivery chain smaller, cooler, more efficient, and scalable — helping AI grow without skyrocketing electricity bills or environmental impact. It also has potential beyond data centers, like in EVs or wireless infrastructure. This feels like a smart step forward for Intel's foundry business in the AI era, leveraging advanced materials and heterogeneous integration. What do you think? Is this the kind of power innovation needed to keep AI scaling sustainably? ⚡
Intel Foundry@Intel_Foundry

Intel Foundry unveils the world’s thinnest GaN chiplet (19 μm). By integrating power and digital control on a single chiplet, it delivers higher efficiency, faster switching, and smaller designs. Learn more: ms.spr.ly/6018Q2h90 #IntelFoundry #Semiconductors

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Rahul Todi
Rahul Todi@rtodi·
We’re in the middle of a massive structural shift in the memory market that some are calling "RAMageddon". No Quick Fix: New factories take years to build, so don't expect a "return to normal" before 2027 or 2028. This table consolidates the end‑to‑end memory landscape and 2026 supply dynamics into a single, easy‑to‑grasp view !
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Rahul Todi
Rahul Todi@rtodi·
Is relying on Intel's process know-how the optimal strategy, or a sign that building from scratch was too risky even for Elon? I think the combination of advanced node know-how and domestic supply chain would have played a major role in driving this.
Intel@intel

Intel is proud to join the Terafab project with @SpaceX, @xAI, and @Tesla to help refactor silicon fab technology. Our ability to design, fabricate, and package ultra-high-performance chips at scale will help accelerate Terafab’s aim to produce 1 TW/year of compute to power future advances in AI and robotics. It was fun hosting @elonmusk at Intel this past weekend!

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Rahul Todi
Rahul Todi@rtodi·
@Sahas088891661 We are first ramping on assembly and test side. Some mature nodes are also in works in parallel. Only post that I believe can we ramp up advanced nodes. There is still a lot of catch up to be done when compared to other geographies in this space.
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Rahul Todi
Rahul Todi@rtodi·
TSMC’s Smart 3nm Move in Japan: Diversifying Supply Chains While Japan Returns to Advanced Chip Leadership TSMC is upgrading its second Kumamoto fab (via JASM) to produce 3nm chips starting 2028 — roughly 15,000 wafers a month and a $17B investment. Why Japan? AI demand is skyrocketing, and relying solely on Taiwan carries growing risks. Japan offers a perfect mix: top-tier suppliers for materials and equipment, strong local customers like Sony, Toyota, and Denso, generous subsidies, and a stable geopolitical partnership. It’s a smart way to diversify without losing efficiency or control. This move strengthens TSMC against competitors. While Samsung works hard to ramp 2nm yields and Intel pushes its 18A node stateside, TSMC is building advanced capacity across trusted allies — Taiwan as the core, Arizona scaling up, and now Japan. Customers gain supply-chain resilience, and TSMC solidifies its lead through better execution and a “tri-polar” setup. Japan benefits enormously. TSMC brings proven, high-volume 3nm tech right away for AI, autonomous vehicles, and robotics. Combined with Rapidus’ domestic 2nm project in Hokkaido (aiming for mass production in 2027), these two efforts are reviving Japan’s semiconductor industry after decades of decline — creating jobs, developing talent, strengthening suppliers, and enhancing economic security. Japan is no longer just a host — it’s stepping back into advanced chip manufacturing in a meaningful way. Latest update from Reuters (April 1, 2026): reuters.com/business/autos…
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Rahul Todi
Rahul Todi@rtodi·
Samsung (005930.KS) is forecasting a record Q1 operating profit of 57.2 trillion won — an 8-fold surge YoY — driven by surging AI chip demand and higher HBM prices. The memory chip leader continues to ride the AI wave with strong momentum in high-bandwidth memory. 🚀 reuters.com/sustainability…
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Rahul Todi
Rahul Todi@rtodi·
MRVL has been quietly wiring the AI framework — and it's just starting to light up. Already in my portfolio, and this deep dive nails exactly why I'm staying long. Connectivity isn't sexy... until it's the bottleneck everyone needs !!
Venu@Venu_7_

As promised, here’s the deep dive on $MRVL. The silicon behind every AI connection. Why $MRVL is one of the most compelling AI infrastructure plays right now. Company: Marvel Technology Price: $90 Market Cap: $80B 1/ Why Marvell? AI models move massive amounts of data between GPUs, switches, storage, and across data centers. Most investors focus on the chips. Few focus on the connectivity. That’s where Marvell sits. Marvell builds the infrastructure that connects AI systems: optical interconnects, Ethernet switching, data center interconnect, custom silicon, and co-packaged optics. In simple terms, Marvell is the connectivity layer of AI infrastructure. Key advantages: • Broad interconnect portfolio • Leadership in 400G and 800G, now first with 1.6T • Custom silicon partnerships with major hyperscalers Every AI accelerator needs high-speed connectivity. That demand continues to grow as clusters scale. 2/ Fundamentals Revenue growth is accelerating. FY22: $4.5B FY24: $5.5B FY25: $5.8B FY26: $8.2B (+42% YoY) FY27 guide: $11B FY28 outlook: $15B Data center is the main driver, growing 40–50% annually. EPS is scaling quickly: FY25 EPS: $1.57 FY26 EPS: $2.84 (+81%) FY27E: $3.27 FY28E: $5+ Margins are expanding and free cash flow is expected to reach $3–4B over the next two years. 3/ Technicals $MRVL has spent nearly two years building a base. Recently it printed a Power Earnings Gap on strong volume with a close near the highs. That typically signals institutional accumulation. 4/ Institutions Institutional ownership is 83%. Large funds like Vanguard, BlackRock, Fidelity, Millennium, and Norges Bank have added positions recently. 5/ My Take The market has been so focused on who makes the best GPU that it's overlooked the company building the entire connectivity fabric that makes AI infrastructure actually work. Every GPU cluster, every custom XPU, every data center interconnect - they all need Marvell's silicon. And this isn't a speculative bet on future technology. The revenue is already here. $8.2 billion last year. $11 billion this year. $15 billion next year. All guided by management with bookings and purchase orders already in hand. Matt Murphy raised guidance three times in six months. Custom silicon went from zero to $1.5 billion. They acquired Celestial AI to own co-packaged optics - a market that could exceed $10 billion by 2030. And they're the first to productize 1.6T interconnects while already demoing the next generation. The stock sat in a base for almost two years while this transformation happened underneath. Now it just gapped up 18% on record earnings with 90M shares of volume. The fundamentals, the technicals, and the institutions are all saying the same thing. If you want exposure to AI infrastructure, $MRVL is the purest and most dominant way to play the connectivity layer - the one part of the stack every accelerator depends on. AI Doesn't Run on Chips Alone - It Runs on Connections. Enjoy!

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Rahul Todi
Rahul Todi@rtodi·
@jpnexpert Japan is a beautiful country. I have been there and will be again in May. People will move as you said if challenging work is there. Its more about what these companies are getting by establishing centers in Japan. Here ASML was benefiting by doing so.
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Jpnexpert
Jpnexpert@jpnexpert·
It’s nothing much to speak of yet—I’m just raising awareness at every opportunity I get. I am new to X; I’ve only been on the platform for two weeks and have about 120 followers so far. I believe Indian IT service companies should establish R&D centers in Japanese cities to employ the smartest talent from around the world, including the best from both Japan and India. Currently, top Indian talent leaves for U.S. companies, and highly skilled people from other countries aren't moving to India either. When it comes to high-earning, high-skilled professionals, language barriers and visas aren't really an issue in Japan. Most of the world's brightest minds would prefer living in Japanese cities over anywhere else if they were offered challenging work and competitive salaries. This would be a win-win for both Indian IT firms and Japan. Right now, Japanese youth are perhaps among the least motivated in the world, but the presence of great companies and high salaries would motivate them, just as they do for young people in the U.S.
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Jpnexpert@jpnexpert·
@rtodi Though the Japanese people and the Japanese government won’t promote competition among cities or competition with Tokyo—something badly needed to energize the economy across the country—I am making an effort in my own way!
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Jukan
Jukan@jukan05·
I've been calling ASML since October last year, predicting that DRAM would face a severe supply shortage, and that as the three major DRAM makers ramp up capacity expansions, ASML's EUV tools would become the subject of an intense scramble. My thesis is gradually playing out. ASML's EUV slots are already fully sold out through 2027, and negotiations for 2028 allocations are now underway. Most recently, Samsung alone ordered 20 EUV systems for a single fab. ASML is still cheap.
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Jukan@jukan05

Samsung Electronics Orders ~20 EUV Tools for P5… "First Cleanroom Completion Next Year" Samsung Electronics has reportedly placed orders for approximately 20 extreme ultraviolet (EUV) lithography tools—critical equipment for sub-10nm advanced processes—with Dutch semiconductor equipment maker ASML. Including deep ultraviolet (DUV) tools, the total lithography equipment order reaches roughly 70 units. Samsung plans to leverage this overwhelming number of lithography tools to maintain a decisive lead over competitors such as SK Hynix and Micron in advanced process technology. According to multiple semiconductor industry sources on April 6, Samsung Electronics has issued purchase orders (POs) to ASML and Japan's Canon for approximately 70 lithography tools to be installed in Phase 1 of its Pyeongtaek Campus Fab 5 (P5). Notably, the ~20 EUV lithography tools alone are valued at over KRW 10 trillion. These tools will be deployed to ramp production capacity on Samsung's 1c node—its 6th-generation 10nm-class DRAM process. As 1c process productivity improves, output of 6th-generation High Bandwidth Memory (HBM4) built on this node will also increase. Samsung mass-produced HBM4 in February this year—a world first—and has been supplying it to NVIDIA, the world's largest AI semiconductor company. HBM4 is mounted on NVIDIA's latest high-performance GPU, Rubin. Rubin is expected to begin shipping in earnest in the second half of this year, with supply going to U.S. big tech companies including Google and Amazon. The industry projects Rubin will generate over $1 trillion in revenue. Samsung is scaling up HBM4 production at its Hwaseong H3 Line 17 and Pyeongtaek P3/P4 fabs in line with the Rubin launch. Once the newly ordered EUV tools are delivered sequentially from ASML, Samsung is expected to simultaneously expand both DRAM and HBM4 output, solidifying its dominant position in the memory semiconductor market. The lithography tools from this order are scheduled for delivery in time for the P5 Phase 1 cleanroom build-out, expected in Q1 next year. Given that semiconductor equipment shipping typically takes about one year, Samsung is projected to begin installing the EUV and other lithography tools in the P5 cleanroom by Q2. Accordingly, Samsung's 1c DRAM and HBM4 production capacity is highly likely to see a significant increase in 1H next year. Industry observers note that this large-scale lithography equipment order marks the beginning of Samsung widening the technology gap over competitors in advanced process technology. SK Hynix, which is in fierce competition in the HBM market, signed an EUV supply contract with ASML worth approximately KRW 12 trillion for around 20 units late last month. SK Hynix plans to bring its total EUV fleet to roughly 40 units to strengthen its competitiveness in advanced processes. However, with Samsung ordering ~20 additional EUV tools, the equipment gap between the two companies in advanced processes is likely to persist. Samsung currently operates approximately 40 EUV tools—roughly double SK Hynix's fleet. With the addition of 70 lithography tools including EUV, Samsung can continue to lead in the race for advanced process supremacy against SK Hynix. Furthermore, analysts believe this positions Samsung favorably in the development race for the 1d node—the 7th-generation 10nm-class DRAM expected to be adopted starting with HBM5E. Samsung plans to deploy approximately 20 EUV tools at Pyeongtaek P5. If all four phases of P5 are configured as DRAM production lines, Samsung could produce more than double the volume of SK Hynix. An industry source familiar with the matter explained: "In the past, it was standard practice to determine NAND flash lines first when building a new fab, but this time the decision was made to expand DRAM lines first due to the expected increase in HBM4 shipments. EUV tools are expected to be installed sequentially starting in Q2 next year." $ASML

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Jpnexpert
Jpnexpert@jpnexpert·
@rtodi Kumamoto is a stunning city, boasting both Shinkansen access and a magnificent castle. I had the pleasure of visiting twice two years ago, and it truly is impressive. Perhaps the city should be developed into a high-tech manufacturing hub to restore it to its former glory.
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