FPGAzumSpass

818 posts

FPGAzumSpass

FPGAzumSpass

@AzumFpg

Developing with fun

شامل ہوئے Temmuz 2020
15 فالونگ8.8K فالوورز
FPGAzumSpass
FPGAzumSpass@AzumFpg·
@Retro_is_COOL MiSTer doesn't allow button combos for key mappings as far as I know. That being said, you could of course create a special core build using a fixed combo with very little effort.
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RetroMateria
RetroMateria@Retro_is_COOL·
@AzumFpg For the PS1 core, is it possible to map the" Open Lid" menu funtion to a 2-button combo?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@wickerwaka @RCAVictorCo Cannot give numbers for every situation as bandwidth depends on burst size and latency (in clock cycles) depends on the clock speed and read/write mode. But one example: at 125 Mhz you can read up to 872MByte/s with 16 clock cycles(128ns) average latency for the first word only
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@wickerwaka @RCAVictorCo Yes, burst size, bandwidth and latency can all be tested with this core. I added the description from the old Patreon post to the readme of the cores github page, so it should be easier to understand what it does.
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イカビク
イカビク@RCAVictorCo·
Does anyone know the DDR3 burst size/bandwidth and latency of MiSTer FPGA?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@nuxvomo Most will just use some existing workflow with e.g. DevKitArm and tonc libraries or other comparable solutions. I went that way, because I think investing time into a workflow that lets me work better and easier is worth it and pays off fast.
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nuxvomo
nuxvomo@nuxvomo·
@AzumFpg That's a really cool approach. Is that a common way of going about it?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
I'm currently working on a Rogue-like action game for the GBA. With roughly 10 minute runs it fits perfectly for a portable console. The first test version will be available soon. Once that is out, I really hope for your feedback and suggestions to make it a great game.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@nuxvomo I modified my GBA emulator and replaced the CPU with the code of the game. That way I can run it native under windows and debug with visual studio while still using PPU, DMA or APU emulation. After each coding day, I do a short test against HW to see it behaves the same.
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nuxvomo
nuxvomo@nuxvomo·
@AzumFpg This is really cool. What are you developing it on? I'm curious about development on old consoles and handhelds.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@syke It might improve scaled or rotated content, but not the normal background layers where this functionality is not possible.
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Matt Hargett
Matt Hargett@syke·
@AzumFpg Will the Hi Res switch on MiSTer core help with a big screen experience?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@Spokavriel It's a real time action game with controls like in Minish Cap or Shining Soul, so there are no random encounters.
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Daniel Thomas Stack
Daniel Thomas Stack@Spokavriel·
@AzumFpg instead of random encounters like in early FF games maybe use that mechanic for something that can call out to more obvious enemies on the map and provoke encounters. Still allowing for randomness without having to go out of your way to provoke most enemies.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@Shadoff_d Sounds good. I have zero experience with PCFX so I don't know how well the rendering features will map to it, but you can probably find a way. It's all written in C code.
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David Shadoff
David Shadoff@Shadoff_d·
@AzumFpg Once it’s complete, would you be open to ports ? I am interested to try porting a game like this to PCFX, mostly because the machine needs more action games, but also as a means of solidifying and improving the developer tools (and libraries) for that system.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@AndreaBogazzi @sixtyfps Yes, instead of outputting only half of the lines each frame, all that have been rendered are always shown.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@hansfbaier @enjoy_digital Very kind, thank you. It's just that I don't have time for it currently with all the things I still have to do.
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V64jr
V64jr@v64jr·
@AzumFpg Will it be possible with YPbPr?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@AndreaBogazzi @sixtyfps The example (SW EP1 Racer) runs at variable fps around 20-50. With 480i, some frames only show half of the rendered image, with 480p we can see the whole image. So yes, in some case(>30fps) more information is shown. With <30 fps you at least never get combining artifacts.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@AndreaBogazzi Yes, give it right into our HDMI scaler without letting the normal video out touch it first.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@zezba9000 No, rendering in RDP is untouched. Only VI is modified/skipped and all pixels are copied to DDR3 for Misters internal scaler.
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@jamesfmackenzie Not for CPU or GPU, the image is already rendered anyway, the N64 just has no output method for 480p usually. It will cost a little bit more DDR3 bandwidth, but we have way more than we need.
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James Mackenzie
James Mackenzie@jamesfmackenzie·
@AzumFpg An awesome feature! As a side question: does it need more CPU/GPU horsepower to do this?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
@dragonstomp As soon as the core is officially released, it will be part of it. I just leave some options out for now with the debug builds to be able to develop faster.
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Patrick Vick
Patrick Vick@dragonstomp·
@AzumFpg Awesome! Quick question if you don't mind. I run my mister in s-video w/ (ultimatemister.com/product/mikes1…) Anyway, I noticed that the colors don't kick in with the current n64 core. Mike has been modding them as time permits.Current mod is a few months old.Any chance for y/c option ?
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DrLilo
DrLilo@DrLilo1·
DrLilo tweet media
Liverpool, England 🇬🇧 QME
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aleXh
aleXh@a1exh·
@AzumFpg As you find these issues. Do you find the solution simplifies the design logic? That you get closer to the original implementation? Or do you find yourself adding special case logic to replicate the behaviour?
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FPGAzumSpass
FPGAzumSpass@AzumFpg·
I worked the last days on fixing some edge case FPU bug in the #MiSTerFPGA N64 core. There is an article on my patreon if you are interested in more technical details about the core development and researching such details.
FPGAzumSpass tweet media
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