Ed Vidal

212 posts

Ed Vidal

Ed Vidal

@EdDevelone

Katılım Haziran 2015
200 Takip Edilen16 Takipçiler
Ed Vidal
Ed Vidal@EdDevelone·
This is 2 iCE40UP5K and 1 iCEHX8K programmed with PipelinC pico-ice/myDocs/pipelinec-ethernet/three-pmod-ethernets.pdf at test-dev-100424 · develone/pico-ice share.google/2C8XOfoK1pizhl…
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Ed Vidal
Ed Vidal@EdDevelone·
On Sat 01/18/25 a Great presentation on PipelineC for pico-ice was presented bu Discord user Absurfatalism Introduction to PipelineC PipelineC is a ne method of writing Hardware Description Language HDL  for FPGAs.
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Ed Vidal
Ed Vidal@EdDevelone·
PipelineC was used to create the gateware.uf2 that was used to program the iCE40UP5K FPGA as a drag and drop.
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Ed Vidal
Ed Vidal@EdDevelone·
Now supporting a 22 pin HSTX
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Ed Vidal retweetledi
Ed Vidal
Ed Vidal@EdDevelone·
Pico-ice is under going a major upgrade to Pico2-ice which will be the Rp2350 with iCE40UP5K FPGA. Now supporting github.com/develone/pico-…
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Ed Vidal
Ed Vidal@EdDevelone·
PipelineC takes in C files and header files to generate gateware.bin using the oss-cad-suite. Thanks to Discord user absurdfatalism it runs nicely on Raspberry Pi 5 8G.
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Ed Vidal
Ed Vidal@EdDevelone·
Discord user absurdfatalism at tinyVision.al introduced PipleLineC for pico-ice RP2040 with iCE40UP5K FPGA. Currently he has helped with 2 working examples Blink & Blink with uart echo github.com/develone/pico-…
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Ed Vidal
Ed Vidal@EdDevelone·
This is the first batch of 10 pico2-ice boards being made by tinyvision.ai a pico2 with a iCE40UP5K fpga.
Ed Vidal tweet media
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Ed Vidal
Ed Vidal@EdDevelone·
The pico-ice rp2040 will soon be replaced with rp2350. Does anyone know where to get more Xess 8 digit 7 segments. or where the are the build files?
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