Hardware Architecture Papers

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Hardware Architecture Papers

Hardware Architecture Papers

@WWVY

New Hardware Architecture papers from https://t.co/6hoXZ9RzY2: systems organization and hardware architecture. Thank you to arXiv for use of its open access interoperability.

Worldwide Katılım Kasım 2010
2 Takip Edilen413 Takipçiler
Hardware Architecture Papers
Memristor Technologies for Dynamic Vision Sensors: A Critical Assessment and Research Roadmap Mohamad Yazan Sadoun, Edris Zaman Farsa, Sarah Sharif, Yaser Mike Banad arxiv.org/abs/2605.13699 [𝚌𝚜.𝙰𝚁]
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Hardware Architecture Papers
Reward-Weighted On-Policy Distillation with an Open Property-Equivalence Verifier for NL-to-SVA Generation Qingyun Zou, Yingze Li, Tianen Liu, Bingsheng He, Weng-Fai Wong arxiv.org/abs/2605.13501 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙻𝙶]
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Hardware Architecture Papers
FPGA-Accelerated Lock Management and Transaction Processing: Architecture, Optimization, and Design Space Exploration Shien Zhu, Gustavo Alonso arxiv.org/abs/2605.13398 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙳𝙱 𝚌𝚜.𝙳𝙲]
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Hardware Architecture Papers
PoisonCap: Efficient Hierarchical Temporal Safety for CHERI Yuecheng Wang, Jonathan Woodruff, Alfredo Mazzinghi, Peter Rugg, Alexandre Joannou, Samuel W. Stark, Robert N. M. Watson, Simon W. Moore arxiv.org/abs/2605.13210 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙲𝚁]
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Hardware Architecture Papers
Enhancing Instruction Prefetching via Cache and TLB Management Alexandre Valentin Jamet, Georgios Vavouliotis, Marti Torrents, Dimitrios Chasapis, Marc Casas arxiv.org/abs/2605.12433 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙿𝙵] 💬To appear at ISCA 2026
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Hardware Architecture Papers
Heterogeneous SoC Integrating an Open-Source Recurrent SNN Accelerator for Neuromorphic Edge Computing on FPGA Michelangelo Barocci, Vittorio Fra, Enrico Macii, Gianvito Urgese arxiv.org/abs/2605.12217 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙰𝙸]
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Hardware Architecture Papers
Sieve: Dynamic Expert-Aware PIM Acceleration for Evolving Mixture-of-Experts Models Jungwoo Kim, Rubens Lacouture, Genghan Zhang, Gina Sohn, Qizheng Zhang, Swapnil Gandhi, Christos Kozyrakis, Kunle Olukotun arxiv.org/abs/2605.11277 [𝚌𝚜.𝙰𝚁]
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Hardware Architecture Papers
TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments Yue Guan, Hongtao Yu, Peng Chen, Daohang Shi, Karthik Manivannan, Nicholas J Riasanovsky, Manman Ren, Lei Wang, Shane Nay, Partha Kanuparthy, … arxiv.org/abs/2605.10905 [𝚌𝚜.𝙰𝚁]
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Hardware Architecture Papers
Reconfigurable Computing Challenge: Real-Time Graph Neural Networks for Online Event Selection in Big Science Marc Neu, Frank Baptist, Thomas Lobmaier, Fabio Papagno, … arxiv.org/abs/2605.10612 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙻𝙶] 💬Accepted to FCCM Reconfigurable Computing Challenge 2026
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Hardware Architecture Papers
Towards an End-To-End System for Real-Time Gesture Recognition from Surface Vibrations Florian Hettstedt, Cedric Giese, Tianheng Ling, Keiichi Yasumoto, Gregor Schiele, … arxiv.org/abs/2605.10110 [𝚌𝚜.𝙰𝚁] 💬Accepted by IEEE PerCom 2026 (PeRConAI workshop, best paper award)
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Hardware Architecture Papers
RFAmpDesigner: A Self-Evolving Multi-Agent LLM Framework for Automated Radio Frequency Amplifier Design Hang Lu, Guochang Li, Qianyu Chen, Huiyan Gao, Shaogang Wang, Xuanyu He, Yiwei Liu, Gaopeng Chen, Nayu Li, Xiaokang Qi, Chunyi Song, … arxiv.org/abs/2605.10093 [𝚌𝚜.𝙰𝚁]
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Hardware Architecture Papers
KV-RM: Regularizing KV-Cache Movement for Static-Graph LLM Serving Zhiqing Zhong, Zhijing Ye, Jian Zhang, Weijian Zheng, Bolun Sun, Xiaodong Yu arxiv.org/abs/2605.09735 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙰𝙸 𝚌𝚜.𝙳𝙲 𝚌𝚜.𝙾𝚂]
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A Reconfigurable Multiplier Architecture for Error-Resilient Applications in RISC-V Core Pragun Jaswal, L. Hemanth Krishna, B. Srinivasu arxiv.org/abs/2605.08785 [𝚌𝚜.𝙰𝚁 𝚌𝚜.𝙰𝙸] 💬Accepted in ISVLSI 2026
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Hardware Architecture Papers
DSPE: An Energy-Efficient Edge Processor for DeepSeek Inference with MerkleTree-based Incremental Pruning, Multi-Stage Boothing Lookup and Dynamic Adaptive Posit Processing Yuhan Zhang, Zhou Wang, … arxiv.org/abs/2605.08615 [𝚌𝚜.𝙰𝚁] 💬Accepted by DAC 2026, Long Beach, CA, USA
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