ChipEstimate

Keysight Introduces PAM3 Signaling with New GDDR7 Transmitter Compliance Solution for Next-Generation Graphics Memory ow.ly/1aCQ50YhmHs

Rambus CXL IP: A Journey from Spec to Compliance With the ongoing efforts of the Rambus engineering team, we have now achieved compliance to CXL 2.0 with our CXL Controller IP, and it has been added to the Integrators List. Read the Rambus blog article ow.ly/4Jhl50YtXwV

Join us for HBM4E Advances ​Bandwidth Performance for AI Training! Memory architecture now defines AI training performance. Examine how Rambus HBM4E advances bandwidth density, efficiency, and scalability—and the system‑level tradeoffs designers face... bit.ly/4bV3Btp

GlobalFoundries and Renesas Expand Partnership to Accelerate U.S. Semiconductor Manufacturing ow.ly/qK5150Yijq9

As AI evolves and improves, hardware engineers are finding ways to leverage it for more complex tasks. Cadence's Ziyad Hanna talks outlines 5 levels of autonomy in Chip Design that mirror those in the automotive industry, what agentic AI can do and... ow.ly/qcLx50YvyTE

Keysight Expands Digital‑Layer Error Performance Validation for High‑Speed 1.6T Interconnects in AI Data Centers Real‑world error performance validation across the full interconnect lifecycle to reduce risk, lower-costs, and ensure reliable... ow.ly/3P2c50YtbHW

Ceva Highlights Breakthrough Year for AI Licensing and Physical AI Adoption in 2025 ow.ly/giiX50Yhnfz

VeriSilicon Enhanced ISP8200-FS Series IP Achieves ASIL B Functional Safety Certification ow.ly/Zhol50Yj8sF

DVB-S2 Modulator Available For Implementation From Global IP Core ow.ly/xKQn50Yhnjm

Synopsys Launches Electronics Digital Twin Platform to Accelerate Physical AI System Development Open platform enables seamless integrations with a comprehensive technology ecosystem and cloud‑based deployment to improve engineering collaboration and... ow.ly/9Ce350Ys37s

Keysight and Qualcomm Advance RF Digital Twins to Scale Massive MIMO and AI-Native 6G Research ow.ly/pH5O50YpYm7

Smartlogic Releases Major Update to High-Channel-Count PCIe DMA IP Core ow.ly/6rgm50Yt9oq

Post-quantum Cryptography (PQC): New Algorithms for a New Era Post-Quantum Cryptography (PQC), also known as Quantum Safe Cryptography (QSC), refers to cryptographic algorithms designed to withstand attacks by quantum computers. Read the Rambus blog ow.ly/4m6N50YtXEC

RISC-V IP Core - TAE520 : R52, Comparable Performance functional-safety processor ow.ly/FPgK50Ykwqe

CAST Debuts TSN-EP-10G IP for High-Performance, Time-Sensitive Networking Ethernet Designs 10-Gigabit Endpoint core expands CAST’s TSN portfolio for automotive, industrial, aerospace, and critical infrastructure applications ow.ly/RO0u50Yt9hC

Renesas Develops SoC Technologies for Automotive Multi-Domain ECUs Essential for the SDV Era ow.ly/1UgQ50YijUF

Keysight and MediaTek Advance AI Driven Uplink Optimization and Model Life Cycle Management for Radio Access Networks ow.ly/Cbfp50YpYne

Keysight Demonstrates 5G-Advanced AI-Powered Channel State Information Compression and Paves the Way for 6G ow.ly/Tr9n50YpY3P

Chips&Media Accelerates WAVE-N Ecosystem: Redefining the Future of Next-Generation Customized NPUs ow.ly/5Uig50YmITt

Renesas Announces General Availability of Renesas 365 Model-based evaluation & optimization technology instantly recommends MCUs based on overall system design context... ow.ly/ZSbo50YtaOW