dt

xsa is already in ~20 submissions so far in Parameter Golf, averaging ~1.13 BPB in those runs. i built a board online to track it. it'll be fun to watch new techniques & contributors rise. wanna follow along? parameter-golf[.]vercel[.]app we've still got 39 days left! i-) how often each technique appears in Parameter Golf ii-) which technique pairs produce the best scores? greener = lower avg BPB iii-) score dist scales with technique count iv-) historical progression of merged records and current open contenders

we’re really not in 0->1 era anymore it’s straight up 0→$250K tokens now

long builds, deep copies, large file migrations and edits, large installs - all get frequently killed mid-run in Claude Code. easily extendable by adding just this to ~/.claude/settings.json:

the problem with modern linux is that it doesn't look like this

Here's a special countdown for 2026. Happy New Year 🎉

The fun part of knowledge is realizing how much you were wrong.

nothing beats fireside vibe coding

there's exactly one query where hard locks gemini thinking into hal-9000 mode every time for me

you can just fold things

Graphics Programming weekly - Issue 419 - December 7th, 2025 jendrikillner.com/post/graphics-…

idk the word of 2025, but nothing is more real than 'everything is computer'

mentioned notebooklm to my close friend’s parents a couple days ago. if ppl use chatgpt for knowledge work or doc analysis, moving to notebooklm is SOO easy. saw it happen live: reg docs + expert reports, whole visual analysis on nano banana pro done in an hour

cr: modular.com/blog/matrix-mu…

so 3‑gen pattern is actually here. ampere (a100): tensor cores are warp‑synchronous (32‑lane lockstep). kernels rely on shared‑memory <> register shuffles & manual tiling. no dedicated hardware path exists for global -> shared copies, though cp.async can stage data; otherwise movement is hand‑pipelined (gm -> sm -> reg) hopper (h100): warp‑group tensor cores (128-thread "collective" mma). tensor memory accelerator (tma) enables hardware managed asynchronous global -> shared copies, offload data movement & increasing effective flop/byte. shared mem is still staging point blackwell (b100/b200): thread‑level mma (tcgen05) compute issued per thread, not tied to warp or warp‑group. mma operands/results can bypass shared memory via a new on‑chip tensor memory (tmem) per SM ~256 KB, when kernels are written to leverage it new dataflow path: tc.cp -> tmem -> thread‑mma, avoiding shared memory in hot loops where supported result: reduced tiling overhead, deeper overlap of copy and compute & higher tensor throughput (as public docs and micro‑benchmarking show)

Lorenz attractor. So satisfying. [bityl.co/QQzD]

>> lazyframe = an optimized data-skipping engine. brings wins on filter / projection–heavy workloads; but limited payoff on full-scan or join-bound queries lazy cuts I/O + memory by avoiding rows and columns your query will never touch. the plan gets compiled into a full logical DAG, then aggressively optimized before a single byte is scanned then the engine runs a fused pipeline (filter → projection → group-by → aggregation) avoiding intermediate materialization + repeated passes, which is where a lot of the efficiency comes from it’s part of my default stack for every recommender pipeline now

learning infinitely is cool i guess

context campuses are the future you’ve just arrived

rl infra getting too smooth. to deploy training and inference on the same group of gpus, ray + --colocate and somehow it’s a full async RL stack with slime. this little flag runs rollouts and training on same stack, instead of separating them into different GPU groups / nodes