Marc Schettke

@lichtfeind Cool, thanks! At the moment I'm using raw pointers, generating a HAL with the patched svd is of course more elegant. Interesting that it didn't work on all PCs? Did you try USB 2.0 as well or only Super Speed?

@marcschettke Sure, will need to dig that back up. But it only enumerated on one PC and I lost interest. At least my svd patch is available. github.com/lichtfeind/ch5…

Getting back into the USB fun. Receive and transmit works now "just" to send the correct stuff.

@lichtfeind Would you mind sharing a few details? Trying the same at the moment - based on the ch32-rs crate, "enhanced" with code ported from hydrausb. It's doing something, but far from enumerating. CH596 + Rust seems to be a good fit, would be great to get it up and running!

after a lot of trial and error i have rust running on the ch569 with some basic USB 3.

Why was the Internet (or its ancestor, the ARPAnet) "invented"? Because Resource Sharing. This video is a real gem, illustrating how (and why!) it all started: youtube.com/watch?v=GjZ7kt…

Alle Jahre wieder... @DHLPaket

@whitequark "I install most experimental tools in the /opt directory"... /opt/Xilinx came to mind instantly. I giggled.

so it turns out i accidentally wrote the first open-source HDL simulator that supports mixed VHDL/Verilog designs tomverbeure.github.io/2020/11/04/VHD…

Can totally relate to this. @rustembedded is going in the right direction though. If now the silicon vendors would jump on that train...

@attiegrande If there is one left - count me in!

So we basically turned the entire internal system upside down... But I think the result is worth it!

@FauthNiklas @JanHenrikH @whitequark Hey Niklas, do you by chance have any spare PCBAs left from that order? I would be very interested, especially since shipping within Germany is cheap and easy.

@DB_Bahn Danke für Eure Antwort. Das habe ich bereits gemacht. Leider ist mir daraufhin eine Quittung zugesandt worden, auf der wieder beide Bahncards gemeinsam aufgelistet sind.

@marcschettke Hey Marc, am besten wenden Sie sich an den BahnCard Service. Kontakte finden Sie auf Ihrer BahnCard oder hier: bahn.de/Online-Kontakt… /gu

Hey @DB_Bahn, was mache ich eigentlich, wenn ich getrennte Quittungen für die Bahncard und die Partner-Bahncard brauche?

@killercup Oh, I just remembered. That's a nice one!

Hey @killercup, I'm pretty sure you once posted a nice #rustlang pattern on twitter. It was about cloning an object before moving it into a closure. Of course I'm not able to find it anymore. Do you by chance know what I mean and would you mind re-posting it?

@JLCPCB @kicad_pcb To my surprise it has nothing to do with the axis origin. Obviously, the C chosen is not yet in the system. Does that mean the 20 parts on my production board aren't in the system yet either? I hope so...

@JLCPCB ...same thing on the bottom side, but flipped. By the way, I'm using @kicad_pcb and github.com/matthewlai/JLC….

@JLCPCB's new assembly service is too tempting not to try out. But for my production board, cpl preview doesn't show any components. So I did a quick test design to see what's wrong. Attached a screenshot of the top preview, coordinate zero is roughly in the middle of the board.

So sad to leave Hong Kong (once again). Amazing city - amazing people! ...and awesome food!

do you like protoboards? do you use mostly SMT devices? well, here's a protoboard design just for you: github.com/electroniceel/…