PULP Platform

We propose Channel Estimation Attention, a low-complexity channel estimator for 5G New Radio (5G NR) multi-user multiple-input multiple-output. Check out "Scalable Attention for 5G NR Channel Estimation": arxiv.org/pdf/2607.16462

Our paper "Quantizing Recursive Reasoning Models" deals with quantization error incurred while applying compact, weight-tied blocks over many refinement steps when solving hard puzzles. Check out: arxiv.org/abs/2607.16237

Calin's slides "Tiny CNNs or Tiny Transformers? An Analysis of Latency, Accuracy and Domain Shift Robustness in Extreme-Edge Image Classification" presented at #WCCI2026 are now online, as well: pulp-platform.org/docs/wcci2026/…

Check out our recent paper "Improving Autonomous Nano-drones Performance via Automated End-to-End Optimization and Deployment of DNNs" PULP-Dronet & Crazyflie 2.1 inside: arxiv.org/abs/2607.12593

We present "WULPUS PRO: Multi-mode Ultra-Low-Power Wearable Ultrasound and Array Imaging with CMUT Support" compact in 39 × 21 × 6 mm, 5g integrates 30 V excitation, 16 time-multiplexed channels, a low-noise receive front-end with up to 70 dB gain. See arxiv.org/pdf/2607.12137

Jayanth's #ISVLSI2026 Kolkata talk "MXCore: Rethinking Matrix Multiplication Accelerators for Microscaling (MX) Arithmetic" is now online, as well. Check it out: pulp-platform.org/docs//isvlsi20…

Here is the first (to the best of our knowledge) demonstration of a low-power MCU-based edge device for Automatic License Plate Recognition. Check out "Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-Based Vision System" arxiv.org/pdf/2607.09768

We present "STEEL: Sparsity-Aware Fused Attention for Energy-Efficient Long-Sequence Inference on AMD’s XDNA™ NPU" with a dataflow formulation of prefill attention, enabling efficient exploitation of spatial parallelism and on-chip memory. See arxiv.org/pdf/2607.09385

Greetings from #ISVLSI2026 in Kolkata with Lionnus, Jayanth & Danilo representing PULP. Here is Danilo's talk: O-POPE: High-Frequency Pipelined Outer Product based GEMM acceleration with minimal buffering overhead: pulp-platform.org/docs/isvlsi202…

The first IMEC CMOS2.0 Academic Consortium meeting with 26 European university groups just took place in Leuven focusing on design automation and chip architecture research for the next-gen chips. Lorenzo, Rafael & Yichao were there for PULP. Read more: imec-int.com/en/press/imec-…

Christopher is currently attending RIGOLETTO EU project meeting in Herzogenaurach 🇩🇪 in the Schaeffler headquarters after the end of the project year 1. The project aims to build a next-gen automotive computing platform on open RISC-V. Read more about cordis.europa.eu/project/id/101…

We would like to share the slides from Run's talk "BioTrain: Sub-MB, Sub-50mW On-Device Fine-Tuning for Edge-AI on Biosignals" presented at the 2026 IEEE World Congress on Computational Intelligence. Check them out: pulp-platform.org/docs/wcci2026/…

Already acquainted with our heterogeneous #RISCV SoC Buckbeak? If not, check out "Buckbeak: A 1.2 TFLOPS/W Reconfigurable Vector/Scalar RISC-V Processor for Precision Scalable Near-Sensor Computing in 22-nm FDSOI Technology" research-collection.ethz.ch/server/api/cor…

Our paper "Physically-Aware Preemptive Virtual Channels for Deadlock-Free AXI Networks-on-Chip" presents an analysis of architectural solutions evaluating 4 deadlock-free AXI4 traffic-class separation schemes while proposing a novel lightweight VC. See arxiv.org/pdf/2607.01430

#ARITH2026 has just taken place in Fulda and our Arpan presented her work "FMA Is (Almost) All You Need: Sharing FMA Resources for Linear and Nonlinear Function Acceleration in Attention-Based Networks". See the slides pulp-platform.org/docs/arith2026… and the paper arith2026.org/papers/FMA%20I…

Democratizing ultasound! From the silicon up!

Christoph & Marco open-sourced their IEEE CEEUS workshop "Anatomy of a Wearable Ultrasound System" doi.org/10.5281/zenodo…. Free to reuse for teaching or projects, find the repo with student version & teacher's notebook with solutions running in Colab here github.com/luuleitner/ana…

The two ODE4EC DIG and PIV EU projects combined kickoff meeting took place last week in Milan. Frank, Yukio ans Rafa were there to represent PULP. Stefan, Miguel and Christian below are celebrating a successful start. 🍺 🍻 ode4ec.eu

We present CVA6-RT, a real-time micro-architectural extension of the CVA6 core to bound worst-case latency and reduce task’s timing execution variability. See "CVA6-RT: an Open-Source Time-Predictable RV64 Processor for Mixed-Criticality Systems" arxiv.org/pdf/2606.26177

The 1st Central & Eastern European Ultrasonics Symposium CEEUS just took place in Warsaw with PULP's Christoph co-chairing the Wearable Track lab4us.github.io/ceeus-2026/. PULP came 1st & 2nd out of 9 teams with Ultrasound watch and TinyProbe in the "Bring Your Own Device" session!