William Chen
1.5K posts

William Chen
@solidwillity
trying to manufacture inference hw + sw @fdotinc @scale_at_gmi



Releasing the model weights and technical report of Kimi K3. Kimi K3 is our most capable model: a 2.8T MoE model with native visual understanding and a 1M-token context window. New model architecture: 2.5x the intelligence per unit of compute, not just more params. Alongside Kimi K3, we're opening up more of the stack behind it — high-performance attention kernels, MoE communication library, and infrastructure for running agent environments at scale. Model weights: huggingface.co/moonshotai/Kim… Tech report: github.com/MoonshotAI/Kim… Tech blog: kimi.com/blog/kimi-k3


We've open-sourced MoonEP, our high-performance communication library for distributed MoE workloads. Built to make expert-parallel communication more efficient at scale, MoonEP helps reduce communication overhead in large MoE training and inference systems. Explore on GitHub: github.com/MoonshotAI/Moo…


We've open-sourced MoonEP, our high-performance communication library for distributed MoE workloads. Built to make expert-parallel communication more efficient at scale, MoonEP helps reduce communication overhead in large MoE training and inference systems. Explore on GitHub: github.com/MoonshotAI/Moo…




We are announcing a long-term strategic partnership with NVIDIA. NVIDIA is making a substantial investment in SSI that will let us 10x our compute in the next 12 months. We reached the point where our research is worth scaling and with this partnership we will be able to. We are honored by NVIDIA’s conviction.

XLA’s strengths and its limitations are the same design decision. Freeze the shapes. See the whole graph. Allocate every buffer before the program runs. Fuse against a global cost model. That is exactly why XLA saturates real hardware and why it recompiles on every new sequence length, refuses data-dependent shapes, and gives you no easy way to say "fuse these two, not those." I wrote up a deep dive into what XLA does, using live IR dumps and source analysis. A few things I measured that surprised me: - The Compile Time: A 24-layer dense tower (360 HLO instructions) compiles on CPU in ~0.03s. A single 4096×4096 matmul takes ~2s on an A100. Because the backend is autotuning it. "XLA is slow to compile" is almost always a story about autotuning and per-shape specialization, not graph size. - The CI Gap: XLA ships Blackwell codegen (sm_100, sm_103), yet the only NVIDIA hardware in public CI is an L4 and an 8×H100 node. Meanwhile, AMD self-hosts presubmit CI on current-gen CDNA4 (gfx950) for every PR. The multi-device H100 workflow? It’s cron-only, and failed 52% of the time in its last 100 runs. The compiler is excellent, but the bargain is real. If you depend on XLA, you need to pin versions, run your own tests, and learn to read HLO. hiraditya.github.io/posts/xla-revi…









2x the performance compared to rtx 6000 and cheaper btw I need 1000 rn

Looks at all of those decoupling caps! So dense? They need an entire reel of 0201 caps to assemble just one board I think.







