Michael Neuling

Super busy 2 months, great progress @Tenstorrent 56 800Gig Ethernet port Galaxies shipping

TT-Ascalon is officially IP released. Go build. RiscV is now high performance. Really happy with the team, quality of the release, quality of the support IP and DV infra. Open source hardware is great. tenstorrent.com/ip/risc-v-cpu

Watch @jimkxa and Miles Dooley launch our new @tenstorrent Ascalon core and its debut silicon Atlantis.

We officially launched TT-Ascalon™, the highest performance RISC-V CPU platform in the industry, and introduced Open Chiplet Atlas™, the ecosystem defining a truly open standard for chiplet interoperability. Join the Open Hardware Revolution. Catch the TT-Blueprint event talks here --> bit.ly/tt-blueprint

@McLarenF1 Australia - hold positions, benefits Lando Japan - hold positions, benefits Lando Hungary - alternate strategy, benefits Lando Monza - correct pitstop error, benefits Lando Singapore - Lando bangs Oscar almost into the wall, hold positions, benefits Lando.

Tenstorrent decided to publish the first benchmark data for Ascalon's RVV implementation using the instruction throughput benchmark of my rvv-bench benchmark suite. <3 camel-cdr.github.io/rvv-bench-resu… Overall, the results look really good so far: #rvv #riscv #simd #tenstorrent

Great analysis of the @tenstorrent Ascalon #RISCV core from @CamelCdr.

@MattP1Tommy Super fine margins are such that Oscar missing FP1 was enough for Norris to get a better result. Oscar did a better job.

What’s yours? 🤔

@rhatr @coreboot Sounds like fun. All the scripts and code are open so it should hopefully be relatively easy if you have a RISC-V P9 port. The virtual console is built into opensbi so I'd recommend building on that.

This is a LOT of fun! But how about running Plan9 (well 9front really) on these cores? @coreboot

If you own a PC with a @tenstorrent Blackhole P100/P150 card, you can try this today in under 5 minutes. No extra hardware needed. We'd love your feedback.

Dreamt of direct Linux access to your AI card's RISC-V cores? 🤔 Checkout github.com/tenstorrent/tt… Tinker, compile, innovate & own your silicon future. Some groups prefer closed software, not @tenstorrent !

The script has leaked

Met with @jimkxa Jim Keller, CEO of @Tenstorrent, a pioneer in the field of AI processors.  During the meeting, Jim Keller announced Tenstorrent’s intention to establish an office and operations in #Cyprus, 🇨🇾🇺🇸

TT is the only AI startup company offering pcie cards from the website you can buy it now without signing up or signing ndas.

Tenstorrent and the State of AI Hardware Startups open.substack.com/pub/irrational…

Thank you @insane_analyst (Irrational Analyst) for the visit. As he mentions in the article, I invited him to visit. Here at @tenstorrent we are looking for the community to help tell us what’s going right and where we need to improve. Hope you enjoy! open.substack.com/pub/irrational…

Round D closed, $693,000,000 Well done @tenstorrent Many thanks to our investors Lot's to do, let's get to work x.com/tenstorrent/st…

At @tenstorrent we are making progress on upstream support for our #riscv Ascalon core. We've got support in LLVM now and support for qemu is on the way. github.com/llvm/llvm-proj… github.com/alistair23/qem…

@tenstorrent TT-Ascalon-D8 CPU support was merged into LLVM recently as well. github.com/llvm/llvm-proj…