Sergiy Nesterenko

@quilterai just hit a milestone we've been working toward for years: An AI-designed, 843-component Linux computer… that booted on the first try. This is Project Speedrun — the hardest test we’ve ever thrown at Quilter. 👇

LIVE w/ @8teAPi to talk Mythos & all things AI :) Guests include: - @ahall_research on the need for independent AI governance - @sergiynest of @quilterai on AI-designed circuit boards - @lukaspet & @axelbacklund of @andonlabs on AI-managed retail x.com/labenz/status/…

About to go on - come join the convo!

Quilter ships. We don't talk about it enough - now we will. BGA fanout and full support for DRC constraints have been two of the most asked for customer features - both shipping imminently. I'm personally most excited for everything that the simulation engine Simbeor will do now that it's a part of the stack!

We laid out an 843-component computer with Quilter AI, built the firmware from scratch, and joined a Google Meet call on it. The board runs GNOME 48, hardware-accelerated Chromium, and live video — on a quad-core ARM Cortex-A53 with a GPU that only supports GLES 2.0. Chromium doesn't support hardware video encode on this class of device, so we wrote 3 custom patches to make it work. This post walks through every firmware decision: why Mutter 48 over 46, how we forced hardware codec selection in WebRTC, and what broke when the Vivante driver returned NULL for a GLES 3.0 function Chromium assumed existed. It also covers getting Doom and Quake running, because a computer that can't play Doom isn't really a computer. The full Yocto layer is open source. If you work with NXP i.MX silicon or embedded Linux, the meta-quilter recipe is yours to build from. quilter.ai/blog/building-…

@blind_via PCB design and verification is changing and I’m glad to be part of it. We are automating it. Talk to an agent, you get a block diagram, pass it to another, you get a schematic and BOM. Next is making that schematic compatible with Altium or KiCAD and BOOM 💥 with @quilterai

Great to see Quilter featured in @MaxMaxfield latest Design News piece on AI across hardware and software design. Max has been covering EDA for 30+ years, so the recognition means a lot. He highlights a detail from Project Speedrun we think deserves more attention: our AI-designed boards ran interchangeably with NXP's own reference hardware. Every combination worked as a drop-in replacement. designnews.com/artificial-int… #PCBDesign #AIforHardware

We go live in one hour. Ben Jordan is at our lab with board 10, the last of our AI-designed computers, ready to come out of the bag and power on. Join us to watch live quilter.ai/project-speedr…

This is board 10. Still in the antistatic bags. Inside are two PCBs that make up a complete computer: an i.MX 8M Mini SOM and its baseboard. Designed by Quilter's physics-driven AI, cleaned up by a human in 38.5 hours, and fabricated at Sierra Circuits. Every other unit we've opened has powered on, configured memory, and booted Linux without issues. Multiple boards have been running continuously for months. On March 26, Ben opens these bags live from our lab and powers them on. If something finally goes wrong on the 10th unit, you'll see it happen in real time. Join our livestream - quilter.ai/project-speedr… #PCBDesign #AIforHardware

RT @quilterai: We manufactured 10 boards for our project Speedrun. 9 have booted Linux on the first attempt. The 10th board goes live in…

@zackslab @quilterai Thanks for the great chat - was a blast!!

part 4: interview with @quilterai CEO Sergiy Nesterenko! intros for first 11 mins, then chat about RL, AI, and PCB design. it was a fun and insightful chat, thanks Sergiy!

Yeah this is key! These forms are how it tells you what it knows about and what it doesn't know about. So super important to get these forms as accurate as possible (we try to auto-detect but its far far from a great auto-detection). For example - there unfortunately isn't a way for Quilter to recognize that analog leg on the 4-20mA - so it won't try to do anything special for it :(. We're adding something for that soon though. On the thin trace widths, a few things to try: first we just use the IPC2221 formula for trace-width-from-current - though that doesn't factor in the inductance on long power supply lines. But try upping the amperage to see bigger traces. You can also manually control trace width in the net widths section. Best way to do it is to "add by net class" - in case you already have a power net class. Looking forward to chat soon - bring tough questions!!

part 3: review of @quilterai's AI PCB place and route. are @i2cjak's future career prospects cooked? will @yacineMTB ever ship a board? find out here...

"Is Quilter secure enough for our IP?" We've heard this from every enterprise team that's come through the door. This week, we have a new answer. Quilter just completed SOC 2 Type II certification. Controls tested over an extended observation period, not a point-in-time check.

@zackslab @i2cjak @quilterai Yeah I’m game! For sure welcome to record and share :) I’ll DM you and let’s find a time!

yes, would be cool to jump on a call (can i record and post to x)? still interested in iterating on this to see how to maximize the usefulness of the current state of these tools. i am sure there are improvements I could have made to the setup. i did see a section for minimum trace width, but it seemed to just use the minimum everywhere it could. my understanding was that it would auto detect power nets and use appropriate trace widths for them. similarly, it sounded like SMPS are auto detected and routed with gate drive/power loop considerations. my courtyards are on mech layer 16. i did adjust my board outline to be on M1, i'll look at where courtyards should go...

@quilterai results are in (this is the best of 3). will do a review video this afternoon. see if you can tell which one was human and which was AI:

Thanks for running these and sharing! I definitely wouldn’t argue against the early days statement :) At this point of course you can see that Quilter won’t one shot this for you. So if there’s time leverage to be gained, it’s in the iterations. First I’d for sure recommend running the RF trace manually - quilter for sure can’t do the via fencing on it. Definitely review and update the circuit comprehension section! We try to auto detect useful circuit info but likely got some wrong. For example you can easily configure thicker traces / higher currents in quilter! Also consider turning on “attempt power pour” for high current nets - it will try to solve them with a poly. Did we correctly detect bypass cap assignments? Likely not all of them. The ones you see in circuit comprehension are what we act on. Finally I noticed the component outlines we used didn’t look right. We typically read courtyards for those - are those set up? We unfortunately don’t yet grab component outline from 3D body. There’s tons to do here for sure to iterate towards a better layout (and that’s typically what we do when we work with customers). As always, more than happy to chat live about any and all of the above :)

@i2cjak @quilterai i'll forgive it on the weird jagged paths. there's more offensive aspects. there's some things it actually did better than i thought it would too. overall though, this is... extremely early days to say the least.

We spent 2025 advancing Quilter's physics engine. Project Speedrun was how we tested all of it at once. 843 components. 5,141 pins. Fabricated by @SierraCircuits. 38.5 hours of human work instead of 428. Booted Linux on the first attempt. Sergiy and Ben walk through the full story on Trace Talks → youtube.com/watch?v=MwZcAn…

I second @yacineMTB on this - with the state of tooling today you still have to understand the design and the physics all the way. Only then can you use a tool like @quilterai effectively. That's the only way you know whether or not the physics critical to your circuit is being accounted for or not. Otherwise, its garbage-in-garbage-out. But if you know what questions to ask - then the RL loop becomes a superpower :)

@yacineMTB @quilterai Fair . We need better tooling for sure . But RL + auto placement + autorouter + full wave EM sims is a really interesting loop .

electrical engineer day 2 we are kicad maxxing today will be wholly dedicated to ricing kicad to make it do what i want

Oh yeah for sure - I assumed no hostility :) I constantly hear from people who wish the state of these kinds of tools was further than it is. They are passionate because they want it to happen! You’ll have some good laughs as you see the results for sure. There’s plenty of “will smith has 6 fingers” type results in there haha - think gpt 2 not gpt4 That said there’s a few things we teach customers to do to get a benefit: 1. Use rooms heavily to define a floor plan. Either place the rooms or at least leave them off the board so quilter knows the groupings . Confirm the rooms are set properly in the “placement regions” section 2. The circuit comprehension section is critical. That’s where quilter tells you what it knows - and by omission what it doesn’t! If you didn’t define it in circuit comprehension, quilter thinks it’s just a generic slow digital signal 3. Expect to iterate. Do a run, download a placed board, adjust placement, resubmit, look at routing etc. for RF stuff - pre route yourself. Ditto for noisy power supplies tbh other than the simplest switching converter 4. Review the design review section. It tells you what we tried to solve for, what we got right and wrong. 5. Expect that you still have to manually finish the board. We probably won’t hit 100% It’s not always helpful, but when it does help, you can really get a solid 2x -3x speed up on layout on many boards. That’s the bar our customers set - if I can take a one week board down to a couple of days, it’s a win and a place to start. Always happy to chat live btw! We honestly spend hours and hours with customers as they get started. It’s not in a great state for self serve yet. Still we put it out for free so that those who are curious can try it out now and again and keep tabs on the progress!

cheers, to be fair, while i seem hostile, i do want AI to solve pcb design. trust me, i would love to create boards as fast as you can create (most) software now. however, i think it's important to also remain transparent and honest about what these tools are currently capable of. which, i do think you're doing. i'm curious to see the results and will give them the most charitable interpretation as i can, while also blending my sense of what is industrially useful.

just incase you have 20 mins to listen to me rant about AI PCB design and @yacineMTB... I'm going to test the current state of AI pcb design on boards I am intimately familiar with... more to come!!!

Oh yeah 100%! First off I love pufferlib and have spent some time with Joseph talking about this problem - we considered a collab. I actually specifically didn’t think we were ready bc we needed to invest in super fast environment so that RL can scale. Most of our team are actually experts in C++, cuda, computational geometry etc for that reason. We write all the cad kernels from the ground up to make them fast. Problem is generally referred to as “auto place” and “auto route” traditionally in the industry. Though it’s always been tackled in small pieces and not end to end. Still first ever paper I’ve seen that tackles this dates back to 1961!!

@sergiynest @yoelrc88 @quilterai check out pufferlib unironically

I am honestly in disbelief that PCB design is manual. I would assume that it would be 99% automated as it is. How are you guys living like this??? It's actually embarassing You guys aren't engineers, you are electr*cians

@yoelrc88 @yacineMTB @quilterai @yacineMTB check this out - this is the furthest we’ve gotten so far: quilter.ai/blog/preparing… Deep dive on building a Linux capable computer with very little human intervention on the layout side.

@yacineMTB Check out @quilterai