PULP Platform
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@pulp_platform
A joint effort of @ETH_en, University of Bologna @Unibo + partners for Parallel Ultra-Low Power computing. Boldly designing open hardware since '13.
Open-source hardware board with open RISC-V MCU cnx-software.com/2026/03/04/dab… The Dabao board has been designed with KiCad (pretty common for OSHW boards), but it is also powered by the open-source 350 MHz Boachip-1x RISC-V MCU, whose Verilog files have also been released. On top of that, it is inspectable with the Infra-Red, In Situ (IRIS) technique, so users can look at the silicon and confirm they’ve got the right chip in a non-destructive way. On the firmware side, the source code for the bootloader and Rust-based Xous OS, featuring virtual memory for process isolation, is also available. The Baochip-1x is well-suited for security-focused applications such as password managers, authenticators, and other high-assurance applications.
We present "TeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-up Cluster Design with High Bandwidth Main Memory Link". 910 MHz in 12nm FinFET, up to 1.89 single precision TFLOP/s & 200 GFLOP/s/W. See arxiv.org/pdf/2603.01629 @yichao_zh @MarcoBertuletti
