OpenHW Foundation

This @@Eff_Connected article explores how RISC-V technologies are reshaping the embedded stack by giving organisations more control at the hardware layer itself. 📖 Read the article: hubs.la/Q04gcq0W0 #RISCV #OpenHW #embedded #opensource #RTOS

Look who got featured @LatchUpConf OpenHW presentation Big announcement is coming on Monday too!

WOHA, big NEWS!!! another, awesome open source Hardware RTL project released by @Ainekk0 at the #OpenHW repository! And it is Apache 2.0 with some NICE #RISCV cores inside...... Plus real chips will be made, check out more! Come and collaborate! @FelixCLC_ @rhatr

@FelixCLC_ @Ainekk0 We like @Ainekk0's taste, awesome gift for open source RTL day!

Happy open source RTL day everyone!!!! @Ainekk0 has partnered with @OpenHWFdn to open source the minion/neighborhood RTL that we're actually using for our next chip! And because we have taste, check out the juicy Apache 2.0 license!!!

Tune in now for Advanced D&V flow using virtual prototype + high-level synthesis for #RISC-V based SoC! Explore early integration, continual validation, and optimization of RISC-V SoCs with virtual platforms and HLS. Join #OpenHW here: hubs.la/Q047GhJ90

🎟️ Live attendees perks: • Chance to win a free ticket to Open Community Experience (OCX) • 25% discount code for #OCX tickets!

TOMORROW: Join OpenHW Foundation, CircuitSutra & RISE-DA for Advanced D&V flow for RISC-V SoCs using virtual prototypes + HLS. See how shift-left methods accelerate HW/SW integration. Register: hubs.la/Q047GfVZ0 #RISCV #HLS #SoCDesign

🎟️ Live attendees perks: • Chance to win a free ticket to Open Community Experience (OCX) • 25% discount code for #OCX tickets!

Join our upcoming #SoCTechTalk! The OpenHW Foundation, CircuitSutra, and RISE-DA will show advanced D&V flows for RISC-V based SoCs using virtual platforms, HLS, and software-driven test cases. hubs.la/Q047GfKK0 #RISC-V #VirtualPrototype #HLS #SoCDesign

🎟️ Live attendees perks: • Chance to win a free ticket to Open Community Experience (OCX) • 25% discount code for #OCX tickets

1 WEEK to go! Don’t miss Advanced D&V flow using virtual prototype + HLS for #RISC-V SoCs with #OpenHW Foundation, CircuitSutra & RISE-DA. Learn how shift-left methods help catch architecture bottlenecks early and avoid costly re-spins. Register here: hubs.la/Q046MSc50

Advanced D&V flow for RISC-V SoCs Explore shift-left design with virtual platforms + HLS and see RISE-DA’s Agentic AI Spec-to-Silicon flow for early HW/SW validation. Register here 👉 hubs.la/Q046MTbL0 #RISCV #HLS #SoCDesign

🥁 Embedded World 2026 is officially underway in Nuremberg! Stop by the #EclipseFdn pavilion to explore open source innovation across embedded systems. A big thank you to our sponsors for helping make our presence at Embedded World possible: @codethink, Eurotech, @OpenHWFdn, OpenVSX, #ThreadX, @SDVeclipse, ORC, @EclipseJavaIDE, @ECDTools and Theia AI. 📍 Meet the team at booth 4-554 in hall 4 and see live demos in action. #embeddedworld #ew26 #opensource

📍 Visiting @embedded_world? Stop by the Eclipse Foundation booth (Hall 4, Booth 4-554) to see how open source is accelerating innovation across embedded systems and IoT. Featured initiatives include: • @OpenHWFdn and #ThreadX • AI-enabled development tools • @SDVeclipse • Open Regulatory Compliance (ORC) Plus live demonstrations from Eurotech and @Codethink Learn more: hubs.la/Q045R9gP0 #EclipseFdn #opensource #EW26 #IoT #EmbeddedSystems #EdgeAI

From wearables to robotics, Synthara is scaling edge AI with in-memory computing and open standards. Explore their use of #OpenHW’s CV32E20X core and CV-X-IF to build power-efficient systems: hubs.la/Q03XVNgt0 #EdgeComputing #RISCV #opensourcehardware

Hear members of the STARRLab team explore how they’re taking RISC-V from the lab and into orbit in our webinar recording: hubs.la/Q03YBKtV0 #RISCV #OpenHW

High performance, minimal power. Discover how Synthara AG unlocked AI efficiency with the CV32E20X core and CV-X-IF interface from #OpenHW. Learn more in this case study on edge innovation and in-memory computing: hubs.la/Q03XVG8F0 #RISCV #EdgeAI #opensource

Learn all about StarRISC, built off the #OpenHW Core-V-MCU project, in our webinar recording from Dr Li Chen and Christopher Elash. Watch it here: hubs.la/Q03YBPyY0 #RISCV

Looking to extend RISC-V CPUs with custom instructions, without touching the core? See how Synthara used OpenHW’s CV-X-IF interface to boost performance for AI, image, and signal processing: hubs.la/Q03XVCMw0 #RISCV #IoT #OpenHardware

High performance, minimal power. Discover how Synthara AG unlocked AI efficiency with the CV32E20X core and CV-X-IF interface from #OpenHW. Learn more in this case study on edge innovation and in-memory computing: hubs.ly/Q03XVF_l0 #RISCV #EdgeAI #opensource