Phatcn Cepltel
72 posts
If you’re curious why $SIVEF is up even more today. $SIVE, as a CHIPS act recipient: Now likely powers the Golden Dome. As the upstream semi supplier since Sivers’ lead customer ALLSPACE got acquired by $YSS. York happens to be a national defense prime contractor with links to the Space Force, Space Development Agency, DoD, and Golden Dome. So Sivers, a mini Swedish company, basically got a backdoor to powering the US space buildout.
$BESI After verifying that some of Besi SMTA 2026 presentation slides have been already publicly available online, I decided to unpack it. Let's dive into the future of AI Chiplet Packaging, Hybrid Bonding, and CPO. Along with the rapid growth of AI-related semiconductors, which are seeing a CAGR of 16.5% , the transition to 2.5D/3D systems that combine multiple chiplets is accelerating to overcome the limitations of traditional monolithic structures. To support this shift, Besi has partnered with Applied Materials to establish an integrated Die-to-Wafer (D2W) Hybrid Bonding line. 1. The Ultimate AI Package Architecture The sheer complexity of next-gen AI architectures is staggering. It’s not just about stacking XPU and HBM anymore; we are seeing the integration of CPO (Co-Packaged Optics) with EIC-PIC Hybrid Bonding and high-precision photonics directly on the same substrate. System-level integration is reaching a whole new level. 2. The Equipment Roadmap Besi’s equipment roadmap serves as a strong leading indicator for the industry. Both their advanced Hybrid Bonding systems (8800 CHAMEO) and ultra-precise Photonics placement tools (2200 evo 1µm) are targeting 2026 H1. The mass-production cycle for sub-10µm optical and AI packaging is shifting into high gear right now. 3. The "Why" Behind Hybrid Bonding Why the aggressive push for Hybrid Bonding? The numbers speak for themselves. Compared to a 55µm pitch Si Bridge, moving to a 9µm pitch Hybrid Bonding approach delivers massive gains: 10X Lower Power 10X Lower Added Latency 30X Interconnect Area Reduction For power-hungry AI and high-speed optics, Cu-Cu direct bonding isn't just an option—it is mandatory. 4. The Scaling Battlefield TCB (Thermo-compression bonding) is being pushed to its absolute limits, moving towards the 2µm pitch mark. Meanwhile, D2W (Die-to-Wafer) Hybrid Bonding is breaking through into sub-micron territory, driving an exponential increase in 3D interconnect density. As interconnects scale below 10µm, the synergy between front-end wafer prep and back-end assembly is becoming the ultimate bottleneck.
