Luca Bertaccini

We present Maestro, a SoC bringing Wearable Ultrasound processing to the edge without offloading computation to remote PCs. See "Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing" arxiv.org/pdf/2503.04581 @mattia_siniga

The PhD thesis of @LucaBertaccini2 titled "Architectural and Microarchitectural Solutions for Multi-Precision Hardware Acceleration" is now available online. Check it our in the research collection of ETH Zurich research-collection.ethz.ch/handle/20.500.…

Three presentations from our team were on schedule of ICCD in Milan today😀. Here is @LucaBertaccini2 presenting "Extending RISC-V for Efficient Overflow Recovery in Mixed-Precision Computations" during the RISC-V Advancements session. See the slides: pulp-platform.org/docs/iccd2024/…

TRISTAN Technical Conference 2024 is on the go in Graz🇦🇹. Here is our @LucaBertaccini2 presenting Ara: A RISC-V Vector Co-Processor for CVA6. You can find the slides on our website: pulp-platform.org/docs/tristan20…

Our highly specialized SoC Maestro in TSMC65 offering an efficient solution for acceleration of radar and ML workloads just came back! Learn more about it: asic.ethz.ch/2023/Maestro.h… @mattia_siniga @YvanTortorella @LucaBertaccini2 @MarcoBertuletti @arunax

Here is our @LucaBertaccini2 at Latch-Up 2024 in Cambridge MA presenting "From an Open-Source ISA to Open-Source HW to Open-Source Silicon". You can find the slides from his talk here: pulp-platform.org//docs/latchup2… @FossiFoundation

#LatchUp2024 is underway in Cambridge, MA 🇺🇸! We are there with @LucaBertaccini2 who will give a talk titled "From an Open-Source ISA to Open-Source HW to Open-Source Silicon" tomorrow at 12:20 EDT. Check out the abstract: #from-an-open-source-isa-to-open-source-hw-to-open-source-silicon" target="_blank" rel="nofollow noopener">fossi-foundation.org/latch-up/2024#… @FossiFoundation

Our paper "MiniFloats on RISC-V Cores: ISA Extensions with Mixed-Precision Short Dot Products" focusing on low & mixed-precision floating-point extensions to #RISCV has been accepted by IEEE Transactions on Emerging Topics in Computing: research-collection.ethz.ch/bitstream/hand… @LucaBertaccini2

We have recently taped out Maestro, a highly specialized SoC fabricated in TSMC65 that offers a compact and efficient solution for the acceleration of radar and ML workloads. Check it out: asic.ethz.ch/2023/Maestro.h…

Great news! Our Carfield automotive SoC has been just taped out and we have been celebrating😇. Check it out on GitHub: github.com/pulp-platform/… Learn more from pulp-platform.org/docs/dac2023/C… @Ang__93 @MikeRogenmoser

The @project_fractal is coming to an end and @LucaBertaccini2 sent us some photos from the final review meetings in Siegen 🇩🇪 . Learn more about the aim and results of this edge computing EU Horizon 2020 project: fractal-project.eu/about/use-case…

The final meeting of @project_fractal is underway at @BSC_CNS in Barcelona fractal-project.eu. Part of today's program was a guided tour to the MareNostrum supercomputer. Our @LucaBertaccini2 is standing in front of MareNostrum 4 (14 PFLOPS)💻bsc.es/marenostrum/ma….

We start the afternoon session with Matteo @mperotti17 & Luca @LucaBertaccini2 and their talk "Boosting PULP with Vector and Transprecision Computing" pulp-platform.org/docs/lugano202…

Echoes is a new open-source @pulp_platform chips combining a compact FFT and a #RISCV multi-precision FPU. It features a novel mult-channel low-latency I2S peripheral. Key features for high-speed, low power frequency domain near-sensor processing (hearables, wearable US) 😎

In order to put to rest incorrect information that recently appeared on social media and several more prominent websites, we have published a summary of our project Occamy: pulp-platform.org/occamy/

Luca @LucaBertaccini2 just presented his work on transprecision FPUs at the APROPOS Winter School organized by @GiuseppeTag & @LucaBeniniZhFe at IBM Research Zurich. This relates to our efforts in @project_fractal & Tristan. Take a look at the slides: pulp-platform.org/docs/APROPOS_t…

The TRISTAN EU Project has just had its kickoff meeting at NXP facilities in Caen 🇫🇷 and we have Alfio and Luca sending pics from the scene. @LucaBertaccini2 @AlfioDiMauro2

Our very own Eclipse is back from the fab! Eclipse is a PULPissimo system with the new FPU using the X-Interface and CV32E40P. Here are some photos of the chip: asic.ethz.ch/2022/Eclipse.h…

Luca Bert and @suehtamacv #riscv summit 22 talk on minifloat-nn extensions and @pulp_platform newest open HW FPU (special bonus: a sneak peek to the Spatz vector unit) youtu.be/X_UqAS33ev8

Look who we have spotted at the #RISCVSummit in San Jose. Our long-time-no-see colleague Andreas @accuminium now working for @lowRISC.