RISC-V International

How do we make RISC-V Vector Extensions more accessible for scientific applications? This featured project for March introduces a new RVV backend for the RAJA framework, enabling portable, vectorized performance across heterogeneous systems. It is a big step toward making RVV practical for real-world scientific and HPC workloads. If you are into performance, portability, and open computing, this one is for you. 👉hubs.la/Q043jJGH0

Ever had someone spend just a few minutes helping you and it completely changed your path? That’s exactly what happened to our Community Director, Megan. She went from tinkering with headgear to speaking on stage, all because someone took a moment to mentor her. Since the RISC-V Mentorship Program launched in 2021, we have grown from 6 mentees in the first year to 49 mentees in 2025, showing the significant impact mentorship can have. We still need more mentors to create opportunities for the hundreds of applicants eager to learn and grow. Summer 2026 Mentorship proposals are open through March 30. Let’s pay it forward and help the next generation of RISC-V innovators thrive! Apply now to become a mentor: hubs.la/Q046lyJr0

If you enjoy #Hackathons, you'll love the #RISCVCommunityChallenge. The challenge with HaDes-V kicked off last week. Learn to design and build your own pipelined 32-bit RISC-V microcontroller. Watch the recording and get all the details here: hubs.la/Q045BDl70 Register by April 3 and jump right into the challenge with everyone else. 🙌🤠

This week at embedded world 2026, join two ecosystem panels on how RISC-V is shaping the future of embedded innovation. Hear insights from Siemens, Andes, Semidynamics, SiFive, Akeana, Nuclei, Synopsys, and DAMO Academy. 📍 Hall 5 Exhibitor Forum ⏰ Tue Mar 10, 10AM | Wed Mar 11, 3PM #ew26 #embeddedworld #RISCV #RISCVEverywhere

Last chance to submit. The Call for Proposals for RISC-V Summit Europe 2026 closes March 9. We’re looking for strong technical talks and papers covering real-world RISC-V work, from AI and platform engineering to security, research, and upstream contributions. Submit: riscv-europe.org/summit/2026/ca… #RISCV

Collaborate. Guide. Build together. Work with motivated mentees and make real progress on your project this summer. RISC-V International handles stipends and onboarding, so you can focus on mentoring and building. 📅 Summer session: June 1 – Aug 31, 2026 📝 Submit your proposal by March 30, 2026: hubs.la/Q045wkzv0

New #RISCVFeaturedWork for March: A solid resource for anyone working on #HPC, scientific computing, compilers, or RISC-V vector extensions. 👇 Support RAJA and Scientific Applications on RVV Architectures showcases how RVV can be integrated into the RAJA performance-portability framework to unlock vector acceleration for scientific workloads. By adding a new RVV backend to RAJA’s vectorization API, this work makes it easier for developers to write portable, high-performance code that runs efficiently across heterogeneous systems, including RISC-V vector platforms. 🤓Check out the short walkthrough video and the project: hubs.la/Q043jG1F0

Ever wanted to design a RISC-V microcontroller but not sure where to start? The Community Challenge with HaDes-V uses a unique “jigsaw puzzle” learning model. You implement each processor stage individually, from fetch to write-back, and validate your work against golden reference modules for instant feedback. This approach helps you: • Connect processor theory with hands-on hardware design • Build confidence through incremental progress • Learn verification, synthesis, and debugging along the way All exercises run remotely. All you need is a laptop. 📅 Livestream kickoff on March 3, 2026 at 9:15am, CET 👉 Plan ahead and register now: hubs.la/Q040Dnr00 __________________________________________________________ #RISCVcommunitychallenge in partnership with Graz

⏰ Deadline extended. The Call for Proposals for RISC-V Summit Europe is now open until March 9. We’re looking for strong technical talks and papers showcasing real-world RISC-V work, from research and new technologies to industry use cases and upstream contributions. Submit by March 9: riscv-europe.org/summit/2026/ca…

We’re heading to SCALE 23x in Pasadena next week as a Silver Sponsor. Find us at booth #417. 💭RISC-V conversations we’re excited to see at SCALE: • Upstreaming Linux before silicon exists using simulation and CI • NixOS on RISC-V, from bootstrap to real hardware and what’s next • Building open, high-performance automotive HMIs with Flutter on RISC-V If you’re into upstream-first Linux, open hardware, and where RISC-V is heading next, let’s connect! #RISCV #linux #RISCVEverywhere

Is #RISCV ready for automotive, and is automotive ready for #RISCV? This panel at embedded world 2026 explores safety, security, AI, ADAS, V2X, and the ecosystem shifts shaping next-gen automotive SoCs. 🗓 Mar 11, 2026 | 11:30–12:30 📍 Hall 5, Exhibitor Forum Stage events.linuxfoundation.org/riscv-at-embed…

📩 You Are Invited to the #RISCVCommunityChallenge with HaDes-V For the first time, we’re bringing a hands-on challenge where you will design and build your own pipelined 32-bit RISC-V microcontroller. Anyone can join. Anywhere. You just need your laptop. Register now to attend the Livestream kickoff on March 3, 2026 at 9:15am, CET More details here: hubs.la/Q042FGTz0

We’re now inviting submissions from across the ecosystem, from timely research and new technology introductions to lessons learned and industry-focused deep dives.

The RISC-V Summit Europe 2026 call for technical contributions is now open. Learn more and submit your technical work here: lnkd.in/eExFUA_4 #RISCV #Europe #CallForPapers

VERIFAIX introduces an AI Debug Agent designed to automate regression failure analysis in hardware verification. As designs evolve, small RTL changes can break massive test suites. This tool identifies root causes, fixes issues in the design or test, and validates the solution automatically. Interested in AI-assisted verification? 🔍 Explore the VERIFAIX project: hubs.la/Q040sgqt0

This “Porting Software to RISC-V” course is built for developers who already understand modern 64-bit architectures – or RISC-V – and want to apply that knowledge in higher-impact work. The course compares widely used 64-bit instruction sets with RISC-V RV64GC to highlight both architectural similarities and key differences. You’ll get hands-on experience with: ✅ Translating C/C++ and assembly code between architectures ✅ Porting SIMD-optimized code using compiler intrinsics ✅ Understanding and adapting to different memory models ✅ Bringing up operating systems and integrating firmware components 👉 Enroll now: hubs.la/Q042DMwj0 ___________________________________________ Free, self-paced course developed with the support of RISC-STAR Solutions, this course is designed for developers who want practical, hands-on experience. #LearnRISCV #RISCV

Tom Gall, VP of Technology at RISC-V International, discusses RISC-V becoming an ISO standard and the future of open computing. Topics include automotive, HPC, data centers, sustainability, and more. 🎙️: hubs.ly/Q041bGVw0

🌍 World RISC-V Days takes place this month! From February 23 to 27, 2026, community-led events will be held across Argentina, Africa, Austria, Bangladesh, Boston (USA), Greece, India, Israel, and Italy, reflecting the continued global momentum of the RISC-V ecosystem. Learn more > hubs.la/Q041bGCs0 #WorldRISCVDays #RISCV

COMING SOON: New Community Challenge for the global RISC-V community On March 3, in collaboration with TU Graz, we will kick off the Community Challenge with HaDes-V. Over a few months, participants will design a pipelined 32-bit #RISCV microcontroller, step by step, using SystemVerilog and industry-standard tools. The challenge is fully modular, beginner-friendly for motivated learners, and grounded in real-world processor design practices. ✅Open Educational Resource ✅Remote participation with just a laptop ✅Open source templates and guided exercises ✅Strong focus on practical skills ▶️ Watch the overview video to see how the challenge works and register for free here: hubs.ly/Q040sk240