
Krste Asanovic
610 posts










Reduce latency? “The promise is to get accelerators and general purpose cores right next to each other,” Cliff Young TPU architect at Google. Working with SiFive? “I don’t know how to get them closer.” #AIHardwareSummit #RISCV #Google


Join us at the #AIHardwareSummit from Sept. 13-15 in Santa Clara, CA! Hear from Krste Asanovic, SiFive co-founder, about how #RISCV and vector compute are gaining momentum, addressing today’s computing challenges, and more. hubs.la/Q01lh3C00 #NoLimits

As digitization of everything around increases, so does the demand for chips. Delighted to discuss what it means to be a systems foundry as part of our IDM 2.0 strategy #HotChips34. Will help support the industry's growing demand for more semiconductors. youtube.com/watch?v=I0PSz2…

There has never been a better, or more important, time to be a technologist. We must all be ambassadors for the crucial role semiconductors play in life today. Together, we will enter the "Golden Age" of semiconductors. Thank you @hotchipsorg for having me.


See you on the pitch! We’re celebrating our UK expansion with cocktails, snacks, and more at Abbey Stadium in Cambridge. Swing by on Aug. 1 to join the celebration. See RSVP info in the graphic below.

Local FPGA support (@XilinxInc U250) and distrib SW sims are coming to FireSim this week! @KarandikarSagar and @NayiriKr will cover these features at OSCAR 2022 at @ISCAConfOrg on Saturday. Thanks to great work by @davidbiancolin @abejgonza @TimSnyderATX! oscar-workshop.github.io/Program.html


RISC-V goes to 11! Happy Birthday to the free and open RISC-V ISA - here's a look back to the 10th year anniversary videos: riscv.org/risc-v-10th/




