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SK Hynix Considers TSMC 3nm for 7th-Gen HBM Brain… "Going for Performance Too" SK Hynix is reportedly weighing the use of TSMC's 3-nanometer (nm) process as its primary option for the logic die — the computational core — of its 7th-generation high-bandwidth memory (HBM), HBM4E. The move signals an intent to gain a performance edge not only through the DRAM dies stacked within the HBM, but also through the application of an advanced process node to the logic die responsible for HBM's computational processing. Meanwhile, SK Hynix's HBM4 (6th-generation HBM), set for mass production this year, is understood to lag behind Samsung in certain performance metrics. According to industry sources on the 20th, SK Hynix plans to use a 10nm-class 6th-generation (1c) DRAM process for the core dies stacked in HBM4E, while applying TSMC's 3nm process to the logic die. For HBM4 — currently being supplied to NVIDIA — SK Hynix uses 10nm-class 5th-generation (1b) DRAM core dies paired with a logic die built on TSMC's 12nm process. Samsung, by contrast, has equipped its HBM4 with core dies manufactured on a 10nm-class 6th-generation (1c) DRAM process and a logic die based on a 4nm process. SK Hynix's strategy is to dramatically boost performance in next-generation HBM by applying finer process nodes. With each successive generation of semiconductor manufacturing, processes become more refined. Finer nodes reduce the width of circuit lines, shortening the distance electrons must travel — thereby increasing operating speed — while also lowering the voltage required for operation, improving power efficiency. Although SK Hynix is understood to have solidified its position as the market leader by supplying the largest volume of HBM4 to NVIDIA, it has reportedly received assessments that it trails Samsung on performance. Samsung has stated that it applied a more advanced process node than SK Hynix in HBM4, achieved a performance advantage on that basis, and became the first in the industry to begin mass shipments. SK Hynix appears to be making a bold bet with its 3nm logic die in HBM4E to reverse that narrative. The thinking is that while HBM4 prioritized stability by relying on proven process nodes, HBM4E will dominate on performance as well, securing a technical edge in the competitive landscape. Starting with HBM4E, the custom HBM market — where logic dies are designed to customer specifications — is expected to fully take off, opening the door to a wider variety of foundry processes being applied to logic dies. Nevertheless, SK Hynix appears to be pushing forward with 3nm as its primary process. The plan is to supply the highest-performing product to large-volume customers such as NVIDIA. HBM4E is slated to be incorporated into Vera Rubin Ultra, the top-tier variant of NVIDIA's next-generation AI chip, Vera Rubin. "In the case of custom HBM4E, since the logic die is manufactured to customer specifications, options ranging from 3nm to 12nm are being considered across the board," said one semiconductor industry official. "However, for the HBM4E logic die that will be supplied in the largest volumes to the market, 3nm is expected to be the primary process used." Separately, with AMD and Google also announcing plans to adopt HBM4E in their next-generation AI chips alongside NVIDIA, competition around HBM4E is set to intensify further. "Samsung made a statement of intent to get ahead in the next-generation market by unveiling HBM4E at GTC 2026, NVIDIA's flagship annual developer conference," another industry official noted. "SK Hynix's strategy appears to be one of dominating not just in supply volume, but in performance as well, when it comes to next-generation HBM."