Deep

A 'cache' is a group of things that are hidden, and is pronounced like "cash." 'Cachet' can mean "prestige," "medicine to be swallowed," or "an official seal," and is pronounced "cash-ay."

any great place to live got that way because a few people understood something and held the line everyone else enjoys the benefits but eventually destroys them because they don't understand so i'm sympathetic to the anti-datacenter people left unchecked the world turns itself into a place you don't want to be

they are calling max a terrorist again

MAX AND HAMILTON HAVE BANGED WHEELS ON LAP1.

github is not a huge indicator for me, but why even bother applying to a founding eng role with this commit graph?

Actually this is correct and I'd go further. Beyond PR, the moral move is for big labs to start heavily investing in UBI lobbyists, thinktanks, whatever, to mitigate the risk of economic upheaval. A better world is possible!

Yes it's the tractable form of brain upload. There's a ton of scifi on brain uploads that requires way too exotic tech (scanning and simulating brains etc), when we're about to get a lossy and approximate version of that *a lot* sooner via LLM simulators. You can easily imagine a "brain upload" startup - you show up for a few days to carry out detailed video interviews, then they use all that data with an LLM finetuning process to "upload" you and give you an API endpoint of your simulation that you can talk to. Look at what's already possible with HeyGen as an example, but combine it with an LLM model that has deep knowledge and personality. Trippy and admittedly kind of dystopian but in principle quite possible around now.

Modern DRAM is based on a brilliant design from IBM. But, we're still paying for a latency penalty that's existed since the 60s! In this video, I'm introducing my research project (Tailslayer) that immensely reduces p99.99 latency on traditional RAM! By implementing a hedged read strategy taking advantage of (undocumented!) channel scrambling offsets, I've gotten as much as 15x reductions in tail latency. The technique works across Intel, AMD, Graviton, DDR4, DDR5, x86, ARM, you name it. Check out the C++ lib I wrote, watch the video, and try it yourself!