LambdaConcept

@yannsionneau This board from @LambdaConcept ecpix-5 based ecp5-5G is one of my craziest boards I have.

According to #litex mem_test I successfully added the @1bitsquared HyperRAM pmod to the @LambdaConcept ECPIX-5 litex SOC! (link to files next)

I'm super happy to welcome my very first corporate PCILeech sponsor - LambdaConcept! Thank You @LambdaConcept for sponsoring PCILeech development 💖 After being sold out for a long time LambdaConcept finally have new ScreamerR04 back in stock! shop.lambdaconcept.com

I don't wanted to write a i2c controller to configure the it6613. So I got the i2c init c code from @ultraembedded and modified it to generate a rom table from it. This rom table speaks i2c to initialize the it6613 hdmi chip @ecpix5 from @LambdaConcept ! ProofOfConcept

@kbeckmann No we don't use systolic arrays that would require too many FPGA MULT cells. And it would not improve the overall inference performance either because the bottleneck is now by far in other layers that we did not implement yet in FPGA (input quantization and dense layers)

@LambdaConcept Interesting project! How is Conv2D implemented? 121 cycles for a 11x11 sounds like you’re not using systolic arrays. I guess a full 11x11 array won’t fit on the ecp5 perhaps. Would be interesting to run the multipliers at a higher clock rate too.

#Tensorflow lite model accelerated on the FPGA using dedicated CNN cores around our #lambdasoc and our #minerva RISC-V CPU. The demo uses our ECPIX5 board. blog.lambdaconcept.com/post/2021-06/f…

Mel Frequency Cepstral Coefficents #mfcc implemented in #nmigen running on the FPGA. blog.lambdaconcept.com/post/2021-05/f…

Quick test of gsomlo's Linux-on-LiteX-Rocket on ECP5 with 64-bit 5.11.0-rc4 RISC-V Linux kernel and rootfs on SDCard: github.com/litex-hub/linu…

Oh, a new #fpga board!! (#ECPIX5 by @LambdaConcept with a 85F ECP5 by @latticesemi) Time for a new #Silice framework! This was the perfect opportunity to start a tutorial on adding new board: github.com/sylefeb/Silice…, work in progress)

New Version of Screamer 100% compatible with M2 coming soon. shop.lambdaconcept.com/3d/pciescreame…

@ultraembedded you'll switch to nmigen ;-)

Plenty still to do on that project, but, what will next year bring? Any suggestions?

Thread: Reflecting a bit on my open-source #FPGA digital design projects this year. I've done quite a lot over the course of the year, probably for the entirely sensible choice of spending rather a lot of time at home and indoors. I hope to do less next year 😉 ...

@eugeneia_ the package is CABGA554 and not 381...

Yo @LambdaConcept! Is my trellis too old, or what am I doing wrong?

Tested on freshly released @Lambdaconcept's ECPIX-5 with SDCard and Ethernet support: ./make.py --board=ecpix5 --build --load, prepare and insert the SDCard and it should boot :)

@eddyb_r @latticesemi something like this ?😜 (4Gbit 256Mx16 )

99€ for a general purpose ECP5-5G (from @latticesemi) board with 8 PMODS, DDR3 RAM, GB Ethernet, microSD UHS-2, HDMI, SATA, USB-C, RGB leds.! Perfect for learning nMigen! (If you find cheaper, just let us know😉) shop.lambdaconcept.com/home/46-1-ecpi…

PCILeech support for AMD Ryzen coming along much more nicely than previously thought. Release already in 1-2 weeks! This is me dumping memory really fast from my Ryzen 3900X with the ScreamerM2. It's super stable 😀

DOOM running on my homemade RISC-V, DDR3 and DVI framebuffer IPs on the @LambdaConcept ECPIX-5! Need more MHz as 25 is not enough! I am burning cycles scaling from 320x200 to 640x400 in SW though (which the FPGA fabric would be much better at)!

First attempt at a DDR3 controller from scratch is working! My RISC-V CPU, DVI framebuffer and DDR3 designs working together to play a GIF on the @LambdaConcept ECPIX-5 @ 640x480x60Hz. The CPU is not doing much - just cycling through the pre-decoded frames at the right rate.

@ico_TC @ultraembedded Fun. We badly need one and currently developing one for nmigen-soc!

@ultraembedded @LambdaConcept Two years ago everyone and Joe wrote a RISC-V core, this year it's memory controllers, what will it be in two years? ;-)

#weekend checklist; - Design a AXI-4 DDR3 memory controller - Get Linux booting on the @LambdaConcept ECPIX-5 using my RISC-V CPU - Drink a couple of bottles of wine - Run half a marathon * Not necessarily in that order...

Got myself a Ryzen 3900x for PCILeech testing today! And a very nice ScreamerM2 with USB-C. Now I'll finally be able to fix the AMD issues I've been having😀