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Electronics Engineering is not just about making robots.
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Swaroop Kumar Yadav
1.8K posts
Swaroop Kumar Yadav
@S2SmeX
Ex-Intern @TRAI | Documenting projects & learning | Building in public 🚀 Open to VLSI/Embedded roles @swaroop2sky
Katılım Ekim 2022
143 Takip Edilen295 Takipçiler
@ATaylorFPGA If i want to use an ov7670 camera, what changes do I have to make?
Just curious...
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@GusEmmett Lattice impressive.
I'll buy things like this someday 🥲
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@S2SmeX Okay. So you dont have to do that in HLS.
Complete you block diag. Crate hdl wrapper -> generate output products -> generate bit stream -> export hardware with Bitstream.
Than create a project in vitis ide with with this xsa. And pickup hello world boiler plate. And program.
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I have updated it a bit, but can't understand so many things. can anyone suggest me a good tutorial on it.
Swaroop Kumar Yadav@S2SmeX
made my first IP : A N-number Matrix multiplier
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Goodnight people. Today was really productive.
- Made my very first vitis program run on FPGA
- got frustrated about matrix multiplier program but got support from X community
- Studied AXI and AMBA protocols: Understood architecture
- Watched Samay Raina special on Youtube
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Approaching 300
this is just a week ago. got lots of support from you guys.
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Sharing glimpses of my previous project: I interfaced on board Accelerometer (Nexys A7 FPGA) and display x,y,z data on 7-segment display.
check out more on : SwaroopKumarYadav.in
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FPGAs are awesome right?
This is Xilinx Spartan Die Shot image. I am building projects in VLSI and embedded stuff. Lets collaborate.
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Using MicroBlaze, I plan to use on board temperature sensor to show real time monitoring.
this is just a fake sensor logic, i implemented. just to understand the workflow. VITIS is cool btw!
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Finally it's working. My very first program running on a FPGA with VITIS HLS.
It was stressful at first, but @X community is awesome.
Thank You so much guys.
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@_prashantbagri I thought I would export it after making it into a proper package. Am I in the correct direction?
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@_prashantbagri Not in this project. I tried it once, that one is another mess. But somehow I did it.
So should I export this ip back to Vitis but shouldn't I add other elements like clock, reset, fifo...
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@_prashantbagri Ok can we do that.
Cause I was making use of that IP in a block diagram with axi FIFO to trigger inputs to my IP and generating hdl out of it.
Can you share any resources, any tutorial or any structured videos.
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@Benathon Yes I made it to some extent, dealing with some clock and reset issues.
But don't you think hls is far more scalable.
You just have to update your cpp code.
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@_prashantbagri Actually I got frustrated, I made this simple matrix multiplier in Vitis and packaged it as IP. Now trying to use it via vivado in order to test on FPGA.
I really need a tutorial or guidance, cause currently it's just me & chatgpt.
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@_Wolf25_ Wokwi, tinkercad are awesome. I just found this new website and loved it.
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A very well made online IDE for embedded prototyping.
velxio.dev
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@rohith1994kc I think of each block as an individual IC, like I am packaging my design into an ic and these are its pins, the best thing, I can design those pins as per my requirement. This analogy makes things easier for me.
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@S2SmeX How to understand that block required for embedded people to work ??
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