Giorgos Saloustros

Check out our new paper on Tebis (dl.acm.org/doi/pdf/10.114…), a distributed LSM KV store that enhances efficiency by managing local NVMe devices with Parallax LSM KV store (github.com/CARV-ICS-FORTH…) and shipping the index to avoid compaction at replicas.

@jorandirkgreef @adeevicc Great suggestions! Are these inspired by this classic paper #skip-to-main-content" target="_blank" rel="nofollow noopener">dl.acm.org/doi/10.1145/32…

My rule of thumb is “one level deeper”. For example, if you want to be a systems coder who builds systems out of things like hash tables, cryptographic primitives or erasure coding, then you need to first implement those things to understand them, before you use them. In other words: If you can implement hash tables, you might end up a layer higher, interfacing with them. Or if you can implement Cauchy Reed Solomon you might end up a layer higher, working on DistSys tail tolerance. Or if you can use Godbolt to understand assembly output, you might end up a layer higher, doing performance optimization. Usually you need to understand “one level deeper” from the level you want to work in.

The most valuable asset you can invest in as a software engineer is: - Understanding The more you understand, the deeper your understanding, the greater your impact. This means crafting “one level deeper”, thinking more. It may take years, but understanding will reward you.

RAW Sockets in C

@gwenshap “memory ≠ storage” probably comes from: -Storage media latency (HDD, flash) was in the ms–µs range, so you hid it behind PCIe + DMA -Flash SSDs never exposed their whole address space as a PCIe region — instead, MMIO regs + an LBA interface. Probably simpler device design.

@gwenshap Been thinking along the same lines for CXL‑SSDs: flash exposed over PCIe as a coherent address space, CXL to trim latency, CPUs/GPUs using plain load/store, and DRAM caches hiding flash latency + GC. Curious to see how NVM ends up getting packaged in these kinds of products.

Twizzler paper is way underrated. The UCSC team rethought Unix for NVM. What if memory access is exactly the same as persistent storage access? What if pointers can be persistent and shared between applications? What if we no longer need SerDe? What if OS involvement in IO is minimal? Well, SQLite will be 4x faster for starters. Seriously though, it’s been a long time since operating systems were rethought, and this paper presents a super compelling vision for the future.

@aerospikedb Flash endurance is rarely a bottleneck today; with ≤300B keys, WA is often just 2–5×. Tail latency has also improved: arxiv.org/html/2407.1558…

@aerospikedb Most modern LSM engines (e.g., RocksDB) use leveled compaction rather than size‑tiered. • In leveled designs, Bloom filters aren’t needed at the largest level → far less memory use, predictable lookups (≈1 I/O).

Explore how log-structured merge trees are suboptimal to Hybrid Memory Architecture and discover why enterprises turn to Aerospike when traditional LSM engines can’t keep up. monkeylink.co/9d6280 #Database #DatabaseManagement #AppDev

@aerospikedb Flash endurance is rarely a bottleneck today; with ≤300B keys, WA is often just 2–5×. Tail latency has also improved: arxiv.org/html/2407.1558…

@aerospikedb A very good overview — thanks for sharing, this is really interesting tech. Just to add a few clarifications for readers

Found this C book, Modern C, h/t @RuiCarrilho5 - published by @ManningBooks but a free copy available for download from INRIA. If you are looking for some advanced C based on C23, look at Level 3 of the book - an awesome platter of topics such as performance, reentrancy, atomicity, threads, and type-generic programming.

They are ants solving a geometric problem and it is great in color.

matklad's talk from @hytradboi 2025 is up! - Deterministic Simulation Testing doesn't work with classical, finite CI - CI is "edge triggered", DST needs "level trigger" - But you can do DST CI yourself! See the end result at devhub.tigerbeetle.com youtube.com/watch?v=xxIGIy…

Joran's talk from @Interledger Summit is up! - In 7 years, OLTP increased 3 orders - Existing infra is general purpose, 20-30 years old - What will the future look like? Plus, questions from @justmoon and @copernicc, former Chief Architect of SWIFT. youtu.be/HSEJ-mlfj7I

If you're interested in databases, this paper is a must-read! It provides an in-depth analysis of the challenges faced when implementing MVCC in most databases and their solutions.

7. Antarctica without ice

@ThaleiaDimitra Μπράβο Θάλεια!

Ending the year with great news!

What every systems programmer should know about concurrency—a very dense but impactful read. Things like lock free and wait free synchronisation techniques will stop seeming like black box if you understand this.

Embeddings are a powerful way to find semantic similarities between pieces of content, but they are heavy. By compressing embeddings into arrays of bits instead of 32bits floats, you drop their size dramatically while only losing 10% in accuracy. #AI emschwartz.me/binary-vector-…

C23 appears to have been published: iso.org/standard/82075… I sort of expected to get a formal notification of some kind, but ¯\_(ツ)_/ Thanks to everyone who contributed to this effort over the past decade or so, particularly our editors @__phantomderp and Freek Wiedijk.

AI Flame Graphs: Showing what's actually running on the HW and how we got there. Uses Intel EU stall profiling and eBPF. brendangregg.com/blog/2024-10-2…

Reading this awesome mini book on Linux page caching today biriukov.dev/docs/page-cach…