Aurelius
3.6K posts

Aurelius
@aurelius_787
EV's, 2nd worst Golfer.


🔥 CPUs are having a moment. #Nvidia launched a standalone CPU. #Arm made its first chip in 35 years. #Intel & #AMD are raising prices amid a supply crunch. What's behind it: Agentic AI needs far more CPU than anyone planned for — driving a structural shift in CPU:GPU ratios toward 1:1. 💡More: buff.ly/Kl4Bcya 🔗


@davidasinclair Can you explain the charts? Not clear what is in them...



A couple of years ago, I made it a goal to post fewer BREAKING posts to cut down on sensationalism, and so when something’s truly BREAKING, you know it is. My number of BREAKING posts over the past 3 years: • 2023: 266 • 2024: 190 • 2025: 148 A 44% drop. Progress! BREAKING posts have made up 3.4% of all my posts so far in 2025.


All aggregators had their payouts reduced to 60% this cycle. We will add another 20% deduction in the next cycle. It became abundantly clear: flooding the timeline with 100 stolen reposts and clickbait everyday crowded-out real creators and hurt new author growth. The next step is to assign a permanent deduction to habitual bait posters who use “🚨BREAKING”on every post. X will never infringe on speech or reach—but we will not compensate for manipulation of the program or our users.



@cburniske Waiting on your signal to deploy capital




If you were a people-pleasing, cutthroat founder, you would: 1. People please: employ the founder and support the foundation 2. Provide resources to the founder 3. Study the roadmap and usage of that internal team — which you employe 4. Covertly and consistently put 10x the resources into that feature set and place it inside a ChatGPT agent offering 5. Product dumping: Give that product for free/at a discount to enterprises, and move even more resources to the OpenAI agent platform 6. Open source project feels clunky compared to the rock-solid corporate one 6. Slowly raise enterprising when you have lock in, pour massive resources into the openai agent platform; Mission accomplished







Intel is proud to join the Terafab project with @SpaceX, @xAI, and @Tesla to help refactor silicon fab technology. Our ability to design, fabricate, and package ultra-high-performance chips at scale will help accelerate Terafab’s aim to produce 1 TW/year of compute to power future advances in AI and robotics. It was fun hosting @elonmusk at Intel this past weekend!








Samsung Electronics Orders ~20 EUV Tools for P5… "First Cleanroom Completion Next Year" Samsung Electronics has reportedly placed orders for approximately 20 extreme ultraviolet (EUV) lithography tools—critical equipment for sub-10nm advanced processes—with Dutch semiconductor equipment maker ASML. Including deep ultraviolet (DUV) tools, the total lithography equipment order reaches roughly 70 units. Samsung plans to leverage this overwhelming number of lithography tools to maintain a decisive lead over competitors such as SK Hynix and Micron in advanced process technology. According to multiple semiconductor industry sources on April 6, Samsung Electronics has issued purchase orders (POs) to ASML and Japan's Canon for approximately 70 lithography tools to be installed in Phase 1 of its Pyeongtaek Campus Fab 5 (P5). Notably, the ~20 EUV lithography tools alone are valued at over KRW 10 trillion. These tools will be deployed to ramp production capacity on Samsung's 1c node—its 6th-generation 10nm-class DRAM process. As 1c process productivity improves, output of 6th-generation High Bandwidth Memory (HBM4) built on this node will also increase. Samsung mass-produced HBM4 in February this year—a world first—and has been supplying it to NVIDIA, the world's largest AI semiconductor company. HBM4 is mounted on NVIDIA's latest high-performance GPU, Rubin. Rubin is expected to begin shipping in earnest in the second half of this year, with supply going to U.S. big tech companies including Google and Amazon. The industry projects Rubin will generate over $1 trillion in revenue. Samsung is scaling up HBM4 production at its Hwaseong H3 Line 17 and Pyeongtaek P3/P4 fabs in line with the Rubin launch. Once the newly ordered EUV tools are delivered sequentially from ASML, Samsung is expected to simultaneously expand both DRAM and HBM4 output, solidifying its dominant position in the memory semiconductor market. The lithography tools from this order are scheduled for delivery in time for the P5 Phase 1 cleanroom build-out, expected in Q1 next year. Given that semiconductor equipment shipping typically takes about one year, Samsung is projected to begin installing the EUV and other lithography tools in the P5 cleanroom by Q2. Accordingly, Samsung's 1c DRAM and HBM4 production capacity is highly likely to see a significant increase in 1H next year. Industry observers note that this large-scale lithography equipment order marks the beginning of Samsung widening the technology gap over competitors in advanced process technology. SK Hynix, which is in fierce competition in the HBM market, signed an EUV supply contract with ASML worth approximately KRW 12 trillion for around 20 units late last month. SK Hynix plans to bring its total EUV fleet to roughly 40 units to strengthen its competitiveness in advanced processes. However, with Samsung ordering ~20 additional EUV tools, the equipment gap between the two companies in advanced processes is likely to persist. Samsung currently operates approximately 40 EUV tools—roughly double SK Hynix's fleet. With the addition of 70 lithography tools including EUV, Samsung can continue to lead in the race for advanced process supremacy against SK Hynix. Furthermore, analysts believe this positions Samsung favorably in the development race for the 1d node—the 7th-generation 10nm-class DRAM expected to be adopted starting with HBM5E. Samsung plans to deploy approximately 20 EUV tools at Pyeongtaek P5. If all four phases of P5 are configured as DRAM production lines, Samsung could produce more than double the volume of SK Hynix. An industry source familiar with the matter explained: "In the past, it was standard practice to determine NAND flash lines first when building a new fab, but this time the decision was made to expand DRAM lines first due to the expected increase in HBM4 shipments. EUV tools are expected to be installed sequentially starting in Q2 next year." $ASML









