Pablo T.
1.8K posts
Pablo T.
@controlpaths
Full time FPGA designer and DSP enthusiast. Also I write a blog about FPGA and DSP where I share projects and treaks.
Spain Katılım Eylül 2021
861 Takip Edilen5.7K Takipçiler
Having an #AI chat on an Artix7 #FPGA? Here you will find out how I did it!
controlpaths.com/2026/01/04/ena…
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A 35B parameters model (with 3B active per token) in an embedded board. Next months are going to be insane.
Sipeed@SipeedIO
High performance #RISCV (RVA23) K3 SBC coming soon! Up to 32GB DDR5, 60T int4 NPU, able to run Qwen3.5 35B-A3B @ 15tps~ Support Ubuntu2604 ! Vote for your preferred config and get early access when it launches next month! sipeed.com/k3/vote
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Wait, what? Now the VPN are the devil?
European Parliamentary Research Service@EP_EPRS
Virtual private networks #VPN are increasingly used to bypass online age verification. Protecting children online is a priority, with new rules being implemented requiring a minimum age for access to some services Read👉 link.europa.eu/FGfr6C #DSA @EP_Justice @FZarzalejos
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@ScalaWilliam I just wanted to see how ot works with Verilog code. It is good enough reviewing code but quite bad writing it.
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@lollipop_stat But it is using the 50% of the RAM. I will test it again with llama.cpp.
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@controlpaths you would not need to use all those cores, ddram is the bottleneck. using all cores means tons of evictions that slow everything down, try 8 instead. and better using llama.cpp or ik_llama.cpp
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Pablo T. retweetledi
The RF world is insane.
Researchers recovered AES-128 keys from a Bluetooth chip by listening to its own antenna from 10 meters away.
Crypto-engine switching noise couples into the RF chain, rides the 2.4 GHz carrier, and leaks out as radio.
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Pablo T. retweetledi
Btw this is 40MSPS oscilloscope *and* an FPGA inside of a Framework laptop expansion card form factor.
You can program the fpga directly and get a 40MB/s channel to it.
Oh and it literally costs less than $30 to make even at low quantities
I will be ordering it and writing some firmware for it, stay tuned!
i2cjak@i2cjak
day 4 of designing* more and more complicated Framework EXPANSION CARDS until they give me a free laptop SPECIAL GUEST FEATURE FROM MY BEST FRIEND @jlcjak A WHOLE OSCILLOSCOPE IN A FRAMEWORK EXPANSION CARD! 10MHz. THIS GUY IS CRACKED FULL EE LAB IN THA FRAMEWORK
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@controlpaths @constrainterror @slimbook @Gloxker Señoro usted es el señoro de mi Sara? Es para seguirlo o ver si lo estoy confundiendo con otro señoro
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Lo prometido es deuda. Unboxing de mi nuevo @slimbook creative (no es publi, que esto lo pagué yo). El diseño personalizado está guapardo y el logo del centro es de mi colega @Gloxker
Teclado RGB
Nvidia 5070
AMD Ryzen AI9
Cosas natsis dentro
Y se va a comer un arch con hyprland como un camión (me niego a meter Omarchy)
Perdonad por la grabación de boomer, pero mi modernez es limitada
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@ivanvnucec @AMD I am just in the opposite side xD I don't like the Eclipse based haha. I am not sure in the newer versions, but a few versions ago, you could open the vitis classic environment instead of the new one. The executable was vitis_classic
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@controlpaths @AMD Boy do I hate this new vscode based Vitis. I prefer the eclipse one. Thanks for the writeup. Ive enjoyed it.
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Last weekend I was using for the first time a Versal ACAP based board, the flagship family of @AMD . CIPS, NOC, AIE-ML were terms unknown for me, now I met them and it was quite well.
controlpaths.com/2026/04/26/exp…
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Pablo T. retweetledi
Unimagineable 10 years ago, but now a practical reality.
Generate a configuration bitstream with open source tools for a Xilinx FPGA with video camera and display.
Even though our web based server caas.symbioticeda.com
Possible thanks to github.com/openxc7 and its contributors
Done and demoed by @regymm0 on cheap indian board!!!
Funded by EU money.
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My partner for the FPGA Developer's Forum at @CERN is this tiny but powerful @AMD Versal ACAP board, the @iwave_systems iW-RainboW-G57M.
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@controlpaths Kewl! Looks like a nice board, what are you building with it?
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