Jan Ole Ernst retweetledi

Design verification still depends on engineers manually reading hundreds of pages of JEDEC specs and translating them into testable representations.
We've released DRAMBench, an open benchmark for autoformalizing DRAM specs and the paper behind it, presented at the @iclr_conf VerifAI Workshop. Our approach introduces an intermediate formal layer of timed Petri nets that capture device states, commands, and timing constraints in a compact, executable model. From that single representation, verification collateral derives automatically.
By Jan Ole Ernst, Dmitri Saberi, Derek Christ, Thomas Zimmermann, Rajath Salegame, Suhaas Bhat, Stanislav Levental, Thomas Ahle, and Matthias Jung, in partnership with @FraunhoferIESE. Both DRAMBench and DRAMPyML are open source, Apache 2.0.
Read it here: arxiv.org/abs/2605.00058
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