UltraSoC

CEO Interview: Barry Paterson of Agile Analog semiwiki.com/ip/agile-analo… #AgileAnalog #Composa #IcInsights #IpCores #McLeanReport

Dr. Ronald Black is featured next in our EEF #speakerseries, he joined Codasip as CEO last year. He is a veteran figure in the semiconductor and technology industry with over 25 years of experience. Register for EEF here: loom.ly/wRpddLQ #GSANews #semiconductors #semis

Experts Talk: RISC-V CEO Calista Redmond and Maven Silicon CEO Sivakumar P R on RISC-V Open Era of Computing semiwiki.com/semiconductor-… #CalistaRedmond #MavenSilicon #Risc-v #RV128 #SivakumarPR #SweetyDharamdasani

Domain specific architectures, processor customisation. @codasip and "design for differentiation"

The #58thDAC Pavilion panel on handling SoC verification in the face trying to change the paradigm in verification approaches to … make it more simple (or is it harder?)

Week In Review: Design, Low Power semiengineering.com/week-in-review… #AI #RISCV @Infineon #semiconductor #semiEDA #verification #LPWAN @FraunhoferIIS #IoT #QuantumComputing @VTTFinland @QuantinuumQC @Codasip @synopsys

Live 58th Design Automation Conference Coverage! semiwiki.com/events/305422-… #CharlesShi #DACKeynotes #Eda #Infinisim #S2CEDA #WallyRhines

RISC-V processor design tools add AXI automation #Business #EDA #Embedded #MPUs/MCUs #Software tinyurl.com/yk2fjqss

Achieving the auto industry’s stringent zero defect goals is becoming a big challenge for makers of #siliconcarbide substrates, which are struggling to achieve sufficient yields/reliability semiengineering.com/inspecting-tes… #SiC #inspection #Gan #automotive #ElectricVehicles

1092 RISC-V cores in AI accelerator for multichip PCIe card @EsperantoTech #RISCVCores #AIAccelerator #PCIeCard #ArtificialIntelligence #RISCV tinyurl.com/yfr2bzbe

We are delighted that recent Computer Systems Engineering graduate Suzanne Candanedo won the @theUKESF & @UltraSoC Automotive Electronics Competition 2020! Read more: warwick.ac.uk/fac/sci/eng/ne… @WarwickDCS @warwickuni @UKAESIN #wespartner #INWED21

📢Call for papers ➡️HiPEAC track at @embedded_world #ew22 🗓️15-17 March 2022 📌Nuremberg, Germany ⏳Deadline: 22 September 2021 HiPEAC has teamed up with embedded world so you can share your research with the top players in the industry. More info 👇 bit.ly/HiPEAC_embedde…

"Electronics is like the heart in a body; without the heart other organs fail to survive." Read more from @UltraSoC Senior Engineer Rasadhi Attale in our Q&A: ow.ly/D2XR50AHCUE #TurnOnToElectronics

The second British chip monitoring company to be acquired in recent months. First there was @UltraSoc acquired by @mentor_graphics, now @moortec acquired by @synopsys. New high level rivalry ahead for silicon lifecycle management? #embedded #electronics eetimes.com/synopsys-acqui…

Happening today! Not too late to register... Join @UltraSoC, @ImperasSoftware and @Andes_Tech for our 3rd in series webinar, which includes answering your questions in a live Q&A session! #risc_v #5G #AI #multicore #debug us02web.zoom.us/webinar/regist…

Thanks to @CIE_Magazine and the Electronic Industry Awards 2020 - our @UltraSoC Bus Sentry automotive cybersecurity IP was highly commended in the Embedded Product category

Register today! Join our webinar next Tuesday with @Andes_Tech and @ImperasSoftware. When registering, please tell us your questions for the live Q&A session! We're gathering a good list but would like more! #risc_v #5G #AI #multicore #debug #technology us02web.zoom.us/webinar/regist…

[FOLLOW US] To follow the @UltraSoC journey, please follow us @mentor_graphics and @siemenssoftware for our #Tessent #EmbeddedAnalytics news. Our combined #technology will benefit the entire #semiconductor #SiliconLifecycle. twitter.com/mentor_graphics

Upcoming events: Virtual ITC-Asia / SEMICON Taiwan, plus webinar with @Andes_Tech + @ImperasSoftware. Read more here createsend.com/t/j-F87287151B…