Shekhar

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Shekhar

Shekhar

@indianspeedster

Distributed Training & Inference @amd | @nyuniversity ‘24 | Views are my own

San Jose, CA Katılım Mart 2016
290 Takip Edilen414 Takipçiler
Shekhar
Shekhar@indianspeedster·
The best compiler abstractions are the ones that disappear. You think about the algorithm. The compiler thinks about the hardware. @OpenAI’s Gluon is an interesting step in that direction. Same for @NVIDIAAI ‘s cutedsl and @AIatAMD’s flydsl..!!
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Shekhar
Shekhar@indianspeedster·
Some thoughts from classical Physics. Energy can neither be created nor be destroyed. So what happens to Energy. Entropy -> Usable Energy transforms into non usable energy. Where will the universe go if all usable Energy transforms into non usable energy ?
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Shekhar
Shekhar@indianspeedster·
Cool optimization in MXFP8 WGRAD: Since (dW = dY^T X), both inputs are logically transposed before the GEMM. Rather than physically transposing BF16 data and then quantizing, quantize along dim1 in the original layout—the dimension that becomes the contracting dimension after .t(). This avoids moving the larger BF16 tensors and avoids separately transposing/remapping the MXFP8 scales. Quantize for the layout you are going to use.
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Christian Gilli
Christian Gilli@nirw4nna·
Next week in San Francisco! I’ll be hosting a workshop on FlyDSL, @AIatAMD new Python DSL for authoring GPU kernels. We’ll go through some basics then you’ll have the chance to experiment with it by building real GPU kernels and run them on real @AMD hardware. If this is not enough you’ll also have the opportunity to see me gesture while pointing at assembly dumps. Don’t miss this opportunity, register now: amd.com/en/corporate/e… See you in San Francisco!
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Shekhar
Shekhar@indianspeedster·
Goated Interview..!! Must watch
Ryan Peterman@ryanlpeterman

David Patterson is a Turing Award winner famous for his contributions to computer architecture. I interviewed him about his past work, thoughts on GPU/TPUs and career advice from half a decade of experience. In this episode: • RISC vs CISC historical debate • Comparing GPUs, TPUs, and CPUs • Is Moore’s law dead? • How to have a bad career • Advice to his younger self Where to watch: • YouTube - youtu.be/Pn4ZwlEh5nw • Spotify - open.spotify.com/episode/6mlRwX… • Apple Podcasts - podcasts.apple.com/us/podcast/the… • Transcript - developing.dev/p/turing-award… Chapters: 00:00 - Intro 00:42 - RISC vs CISC 12:51 - Compilers 17:38 - GPUs 23:07 - GPU vs TPU vs CPU 32:12 - Is Moores law dead? 38:04 - GPU benchmarks 41:40 - How to have a bad career 49:59 - Courage and optimism 55:56 - Advice for his younger self 58:15 - Outro

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Shekhar
Shekhar@indianspeedster·
Excited to see this collaboration come together! Our team has been collaborating closely to bring the Vime RL stack to AMD Instinct GPUs—from ROCm enablement and upstream contributions to end-to-end validation and performance optimization. It's exciting to see another open-source RL framework running natively on AMD hardware, and we look forward to continuing our contributions to the open-source AI ecosystem. @lizli202503 @linluo77 @roaner @AIatAMD @EmadBarsoumPi
vLLM@vllm_project

🎉 Great to see the @AMD team for bringing ROCm support to vime, the vLLM ecosystem's RL post-training framework. End-to-end RL post-training now runs natively on AMD Instinct MI355X GPUs. vime uses vLLM as its rollout backend, so on ROCm it inherits the full vLLM rollout stack with no separate code path. The @AIatAMD team validated the pipeline end-to-end, upstreamed the ROCm-specific fixes, and shipped a prebuilt container so you can skip building from source. What works today: - GRPO training - Colocated and async (non-colocated) train/rollout - Megatron-LM training + vLLM rollout backends - Qwen3 dense and MoE models On MI355X, Qwen3-8B sustains ~4,100 tokens/gpu/s, and the train-rollout logprob diff holds low and stable. 🔗 vllm.ai/blog/2026-07-1…

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Ayushman Singh
Ayushman Singh@ayush1399·
@indianspeedster Even worse is Fable writing a 50 line PR message for a simple env var change in a kube manifest
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Shekhar
Shekhar@indianspeedster·
Fable writing 10 lines of comment for 1 line of code change is the most annoying part when you use it in production code :D
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Ramine Roane
Ramine Roane@roaner·
@SemiAnalysis_ Here it is: a PR we just submitted to InferenceX got merged:
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Shekhar
Shekhar@indianspeedster·
GPU vendors tell us the bandwidth numbers, but what about latency? Vasily Volkov used a very simple trick to reverse engineer it: pointer chasing. idx = a[idx]; The next load depends on the result of the previous one, so the GPU can't overlap the memory accesses or hide the latency. Run this N times, measure the total cycles, divide by N. That's it.
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light
light@reprompting·
This led me to find out just how "hidden" Vasily Volkov seems to be. There isn't much information about him on the web, especially considering how influential many of his papers and talks have been. 1. Better Performance at Lower Occupancy nvidia.com/content/gtc-20… 2. Benchmarking GPUs to Tune Dense Linear Algebra mc.stanford.edu/cgi-bin/images… 3. Use registers and multiple outputs per thread on GPU laurel.datsi.etsiinf.upm.es/_media/proyect… 4. Unrolling parallel loops nvidia.fr/docs/IO/116711… 5. LU, QR and Cholesky Factorizations using Vector Capabilities of GPUs netlib.org/lapack/lawnspd… 6. Understanding Latency Hiding on GPUs www2.eecs.berkeley.edu/Pubs/TechRpts/… 7. A microbenchmark to study GPU performance models dl.acm.org/doi/pdf/10.114… 8. Parallel computing experiences with CUDA cs.virginia.edu/~skadron/cuda_… 9. Fitting FFT onto the G80 Architecture people.eecs.berkeley.edu/~kubitron/cour… 10. Stencil Computation Optimization and Auto-tuning on State-of-the-Art Multicore Architectures csd.uwo.ca/~mmorenom/CS43… 11. Using GPUs to accelerate the bisection algorithm for finding eigenvalues of symmetric tridiagonal matrices eecs.berkeley.edu/Pubs/TechRpts/… 12. Building an Efficient Hash Table on the GPU sciencedirect.com/science/chapte… 13. Programming inverse memory hierarchy: case of stencils on GPUs laurel.datsi.etsiinf.upm.es/_media/proyect… And these don't even cover his contributions to computer graphics and computational neuroimaging. For someone whose work has had such a lasting impact across multiple fields, he seems remarkably low-profile.
light@reprompting

todays read is vasily volkov's phd thesis on gpu latency hiding. it's quite long, so i think it'll keep me occupied for the next few days. www2.eecs.berkeley.edu/Pubs/TechRpts/…

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Shekhar
Shekhar@indianspeedster·
One equation from 1961 (Little's law) still explains why GPU kernels are getting harder to write. Concurrency ≈ Throughput × Latency Throughput keeps increasing. Latency barely moves. So every new GPU generation demands more independent work to keep the machine fed.
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lsm_
lsm_@thisispiyushK·
@indianspeedster Can you share the link to the blog? I would love to read it
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Shekhar
Shekhar@indianspeedster·
My last blog on occupancy math for MI355X was inspired by Vasily Volkov's GTC talk, Better Performance at Lower Occupancy. I just found another gem from him: Understanding Latency Hiding on GPUs. That'll be my Independence Day weekend reading. I'll try to put together a few posts showing how these latency-hiding strategies can be applied to AMD GPUs, with practical examples and profiling insights.
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Shekhar
Shekhar@indianspeedster·
Excited to share that I’ve been promoted to Member of Technical Staff (MTS) at AMD! Grateful for the amazing teammates, mentors, and leadership who’ve trusted me with challenging problems across AI infrastructure, GPU kernels, and inference. Still learning every day. Looking forward to building even bigger things.
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Shekhar
Shekhar@indianspeedster·
@valigo Karpathy didn't even reply to this tweet and you feel he can be a sales guy ? lol
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Valentin Ignatev
Valentin Ignatev@valigo·
Andrej Karpathy lost access to Fable due to regulations, so they made him a slack bot salesguy 😭
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