
Tim 'mithro' Ansell
13.3K posts

Tim 'mithro' Ansell
@mithro
Open Source Hardware Geek
Sydney, Australia Katılım Ocak 2009
599 Takip Edilen6.1K Takipçiler

@elodiebear_m @splinedrive Google funded at least 80 individual projects before this run, so a whole bunch of people have done stuff already, there is a bunch of info on the Crowd Supply campaign @ crowdsupply.com/wafer-space/gf…
This run's silicon should be back in Aprilish....
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@splinedrive @mithro GF180MCU open ASICs? This changes the game. When can we see your test results?
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I made my RISC-V ASIC/FPGA KIAN-V implementations open and free for everyone.
github.com/splinedrive/ki…

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Tim 'mithro' Ansell retweetledi

@matthewvenn @Zeptobars @tinytapeout We'll have to get you to do some GF180MCU / wafer.space dies at some point!
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Tim 'mithro' Ansell retweetledi

I'm with @Zeptobars and we're going to try a FIB (focused ion beam) edit on a @tinytapeout chip.
Here's the incredible machine that can do it...


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Tim 'mithro' Ansell retweetledi

@Zeptobars After some more messing around we realised the 1.8v core voltage was reading 3.3v, so we've likely killed the chip. Calling it a night and going for dinner!
Here's a final shot of our silicon sculpture!

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Tim 'mithro' Ansell retweetledi

Ion beam is warmed up, now we have to align the SEM and the ion beam. Then when we drill with the ion beam we'll be in the right place to see the results with the SEM.
On the left we have the ion beam (and master at work @zeptobars), and on the right the SEM and me!


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Tim 'mithro' Ansell retweetledi
Tim 'mithro' Ansell retweetledi
Tim 'mithro' Ansell retweetledi

I’m proud to be part of wafer.space, working on open-source ASICs in the GF180MCU process.
Only a handful of people worldwide have done this so far.
Open-source silicon history in the making.
@mithro

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Tim 'mithro' Ansell retweetledi

I’ve wired everything up now. @GMahovlic helped me a lot, especially with the SDRAM wiring and the connector. I don’t have much experience—this is my first real board—so I’m going to check the signals again and double-check the connector pinout. Then I’ll send it to a fab/assembly shop for soldering. I really wanted to finish this so I can continue with my next Linux SoC, StealthV. cc:@mithro wafer.space


asic destroyer@splinedrive
Celebrating KianV RISC-V Chip Design
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Tim 'mithro' Ansell retweetledi

KianV Linux ASIC SoC — let’s simulate it on an FPGA that behaves exactly like the SoC in performance and runs the latest mainline Linux kernel, version 6.19-rc1. gf180mcu wafer.space
asic destroyer@splinedrive
Wild that 50 years later I can, as a one-man show, build an ASIC from scratch that boots Linux and outperforms a PDP-11/83. LMAO. wafer.space #gf180mcu
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Tim 'mithro' Ansell retweetledi

Wild that 50 years later I can, as a one-man show, build an ASIC from scratch that boots Linux and outperforms a PDP-11/83. LMAO. wafer.space #gf180mcu

Dave W Plummer@davepl1968
My PDP-11/83, PDP-11/44, and VAX 4000-705A doing important work on stuff.
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Tim 'mithro' Ansell retweetledi
Tim 'mithro' Ansell retweetledi

@ID_AA_Carmack Just realised, it could be useful for RL! Could put 50..80 copies on a die, running 50 MHz each. ROMs are tiny - would embed on the same MPW die. 3Gsamples per second for $100.
Maybe 30 of them on a 180 nm with @mithro's Wafer Space. Should be around 1Gsample per second for $10.
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Tim 'mithro' Ansell retweetledi

@ico_TC @mithro GF180 provides 64, 128, 256 and 512 byte SRAM blocks to use in open source designs.
That said, more general solution would be amazing! I think Staf is working on one: youtu.be/G9uyKw3XoiM

YouTube
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@gojimmypi @MattDIYgraphics @mithro It is not just Verilog, but open GDS (layout file) and the whole configuration so that anyone can send the chip to fabrication on 130 or 180nm process.
github.com/rejunity/z80-o…
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Tim 'mithro' Ansell retweetledi

Next Linux ASIC Design wafer.space @mithro
RV32IMA + Zicntr/Zicsr/Zifencei/SSTC with full MMU — running uLinux, Linux, and xv6.
featuring SDRAM, SDCARD, ETHERNET, external BOOTROM, 1× UART, and GPIO @ 3.3 V.
With huge help from Leo!

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Tim 'mithro' Ansell retweetledi
Tim 'mithro' Ansell retweetledi

Maybe by spring I’ll have my own custom network Linux RISC-V chip, built from scratch on GF180MCU by wafer.space. That would be really crazy.

asic destroyer@splinedrive
I can run a small part of OpenSBI in gate-level simulation with the Micron SDRAM model, but even that takes over an hour. I’ll check the results after 24 hours — a full Linux boot could theoretically take 180–1800 hours.
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